Merge "disp: msm: dsi: enable dfps trigger at mdp intf flush" into display-kernel.lnx.5.4 (0af93447) · Commits · e / devices / android_kernel_fairphone_FP5

msm/dsi/dsi_catalog.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -215,6 +215,7 @@ static void dsi_catalog_phy_2_0_init(struct dsi_phy_hw *phy)
		dsi_phy_hw_v2_0_dyn_refresh_pipe_delay;
		phy->ops.dyn_refresh_ops.dyn_refresh_helper =
		dsi_phy_hw_v2_0_dyn_refresh_helper;
		phy->ops.dyn_refresh_ops.dyn_refresh_trigger_sel = NULL;
		phy->ops.dyn_refresh_ops.cache_phy_timings =
		dsi_phy_hw_v2_0_cache_phy_timings;
		}
		@@ -250,6 +251,7 @@ static void dsi_catalog_phy_3_0_init(struct dsi_phy_hw *phy)
		dsi_phy_hw_v3_0_dyn_refresh_pipe_delay;
		phy->ops.dyn_refresh_ops.dyn_refresh_helper =
		dsi_phy_hw_v3_0_dyn_refresh_helper;
		phy->ops.dyn_refresh_ops.dyn_refresh_trigger_sel = NULL;
		phy->ops.dyn_refresh_ops.cache_phy_timings =
		dsi_phy_hw_v3_0_cache_phy_timings;
		}
		@@ -286,6 +288,8 @@ static void dsi_catalog_phy_4_0_init(struct dsi_phy_hw *phy)
		dsi_phy_hw_v4_0_dyn_refresh_pipe_delay;
		phy->ops.dyn_refresh_ops.dyn_refresh_helper =
		dsi_phy_hw_v4_0_dyn_refresh_helper;
		phy->ops.dyn_refresh_ops.dyn_refresh_trigger_sel =
		dsi_phy_hw_v4_0_dyn_refresh_trigger_sel;
		phy->ops.dyn_refresh_ops.cache_phy_timings =
		dsi_phy_hw_v4_0_cache_phy_timings;
		phy->ops.set_continuous_clk = dsi_phy_hw_v4_0_set_continuous_clk;

msm/dsi/dsi_catalog.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -266,6 +266,8 @@ int dsi_ctrl_hw_cmn_wait4dynamic_refresh_done(struct dsi_ctrl_hw *ctrl);
		int dsi_phy_hw_v3_0_cache_phy_timings(struct dsi_phy_per_lane_cfgs *timings,
		u32 *dst, u32 size);

		void dsi_phy_hw_v4_0_dyn_refresh_trigger_sel(struct dsi_phy_hw *phy,
		bool is_master);
		void dsi_phy_hw_v4_0_dyn_refresh_helper(struct dsi_phy_hw *phy, u32 offset);
		void dsi_phy_hw_v4_0_dyn_refresh_config(struct dsi_phy_hw *phy,
		struct dsi_phy_cfg *cfg, bool is_master);

msm/dsi/dsi_display.c

+34 −0

Original line number	Diff line number	Diff line
		@@ -4371,9 +4371,13 @@ static int _dsi_display_dyn_update_clks(struct dsi_display *display,
		struct link_clk_freq *bkp_freq)
		{
		int rc = 0, i;
		u8 ctrl_version;
		struct dsi_display_ctrl m_ctrl, ctrl;
		struct dsi_dyn_clk_caps *dyn_clk_caps;

		m_ctrl = &display->ctrl[display->clk_master_idx];
		dyn_clk_caps = &(display->panel->dyn_clk_caps);
		ctrl_version = m_ctrl->ctrl->version;

		dsi_clk_prepare_enable(&display->clock_info.src_clks);

		@@ -4411,6 +4415,15 @@ static int _dsi_display_dyn_update_clks(struct dsi_display *display,
		}
		dsi_phy_dynamic_refresh_trigger(m_ctrl->phy, true);

		/*
		* Don't wait for dynamic refresh done for dsi ctrl greater than 2.5
		* and with constant fps, as dynamic refresh will applied with
		* next mdp intf ctrl flush.
		*/
		if ((ctrl_version >= DSI_CTRL_VERSION_2_5) &&
		(dyn_clk_caps->maintain_const_fps))
		goto defer_dfps_wait;

		/* wait for dynamic refresh done */
		display_for_each_ctrl(i, display) {
		ctrl = &display->ctrl[i];
		@@ -4429,6 +4442,7 @@ static int _dsi_display_dyn_update_clks(struct dsi_display *display,
		dsi_phy_dynamic_refresh_clear(ctrl->phy);
		}

		defer_dfps_wait:
		rc = dsi_clk_update_parent(&display->clock_info.src_clks,
		&display->clock_info.mux_clks);
		if (rc)
		@@ -4828,8 +4842,10 @@ static int dsi_display_set_mode_sub(struct dsi_display *display,
		int rc = 0, clk_rate = 0;
		int i;
		struct dsi_display_ctrl *ctrl;
		struct dsi_display_ctrl *mctrl;
		struct dsi_display_mode_priv_info *priv_info;
		bool commit_phy_timing = false;
		struct dsi_dyn_clk_caps *dyn_clk_caps;

		priv_info = mode->priv_info;
		if (!priv_info) {
		@@ -4855,8 +4871,26 @@ static int dsi_display_set_mode_sub(struct dsi_display *display,
		memcpy(&display->config.lane_map, &display->lane_map,
		sizeof(display->lane_map));

		mctrl = &display->ctrl[display->clk_master_idx];
		dyn_clk_caps = &(display->panel->dyn_clk_caps);

		if (mode->dsi_mode_flags &
		(DSI_MODE_FLAG_DFPS \| DSI_MODE_FLAG_VRR)) {
		display_for_each_ctrl(i, display) {
		ctrl = &display->ctrl[i];
		ctrl->ctrl->hw.ops.set_timing_db(&ctrl->ctrl->hw,
		true);
		dsi_phy_dynamic_refresh_clear(ctrl->phy);

		if (!ctrl->ctrl \|\| (ctrl != mctrl))
		continue;

		if ((ctrl->ctrl->version >= DSI_CTRL_VERSION_2_5) &&
		(dyn_clk_caps->maintain_const_fps)) {
		dsi_phy_dynamic_refresh_trigger_sel(ctrl->phy,
		true);
		}
		}
		rc = dsi_display_dfps_update(display, mode);
		if (rc) {
		DSI_ERR("[%s]DSI dfps update failed, rc=%d\n",

msm/dsi/dsi_drm.c

+15 −1

Original line number	Diff line number	Diff line
		@@ -976,8 +976,9 @@ int dsi_conn_post_kickoff(struct drm_connector *connector,
		struct dsi_display_mode adj_mode;
		struct dsi_display *display;
		struct dsi_display_ctrl m_ctrl, ctrl;
		int i, rc = 0;
		int i, rc = 0, ctrl_version;
		bool enable;
		struct dsi_dyn_clk_caps *dyn_clk_caps;

		if (!connector \|\| !connector->state) {
		DSI_ERR("invalid connector or connector state\n");
		@@ -993,9 +994,11 @@ int dsi_conn_post_kickoff(struct drm_connector *connector,
		c_bridge = to_dsi_bridge(encoder->bridge);
		adj_mode = c_bridge->dsi_mode;
		display = c_bridge->display;
		dyn_clk_caps = &(display->panel->dyn_clk_caps);

		if (adj_mode.dsi_mode_flags & DSI_MODE_FLAG_VRR) {
		m_ctrl = &display->ctrl[display->clk_master_idx];
		ctrl_version = m_ctrl->ctrl->version;
		rc = dsi_ctrl_timing_db_update(m_ctrl->ctrl, false);
		if (rc) {
		DSI_ERR("[%s] failed to dfps update rc=%d\n",
		@@ -1003,6 +1006,17 @@ int dsi_conn_post_kickoff(struct drm_connector *connector,
		return -EINVAL;
		}

		if ((ctrl_version >= DSI_CTRL_VERSION_2_5) &&
		(dyn_clk_caps->maintain_const_fps)) {
		display_for_each_ctrl(i, display) {
		ctrl = &display->ctrl[i];
		rc = dsi_ctrl_wait4dynamic_refresh_done(
		ctrl->ctrl);
		if (rc)
		DSI_ERR("wait4dfps refresh failed\n");
		}
		}

		/* Update the rest of the controllers */
		display_for_each_ctrl(i, display) {
		ctrl = &display->ctrl[i];

msm/dsi/dsi_phy.c

+26 −0

Original line number	Diff line number	Diff line
		@@ -1221,6 +1221,32 @@ void dsi_phy_config_dynamic_refresh(struct msm_dsi_phy *phy,
		mutex_unlock(&phy->phy_lock);
		}

		/**
		* dsi_phy_dynamic_refresh_trigger_sel() - trigger dynamic refresh and
		* update the video timings at next frame flush call.
		* @phy: DSI PHY handle
		* @is_master: Boolean to indicate if for master or slave.
		*/
		void dsi_phy_dynamic_refresh_trigger_sel(struct msm_dsi_phy *phy,
		bool is_master)
		{
		if (!phy)
		return;

		mutex_lock(&phy->phy_lock);
		/*
		* program DYNAMIC_REFRESH_CTRL.TRIGGER_SEL for master.
		*/
		if (phy->hw.ops.dyn_refresh_ops.dyn_refresh_trigger_sel)
		phy->hw.ops.dyn_refresh_ops.dyn_refresh_trigger_sel
		(&phy->hw, is_master);
		phy->dfps_trigger_mdpintf_flush = true;

		SDE_EVT32(is_master, phy->index);

		mutex_unlock(&phy->phy_lock);
		}

		/**
		* dsi_phy_dynamic_refresh_trigger() - trigger dynamic refresh
		* @phy: DSI PHY handle