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Commit 0ad7fb7c authored by Dave Airlie's avatar Dave Airlie
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Merge tag 'du-next-20190208' of git://linuxtv.org/pinchartl/media into drm-next 



Renesas display drivers changes for v5.1 (2nd part):

- R8A7744 LVDS support
- DPAD0 output support on D3/E3

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190208003355.GG10386@pendragon.ideasonboard.com
parents 1e92a226 a6cc417d

Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ Required properties: 


- compatible : Shall contain one of

  - "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders

  - "renesas,r8a7744-lvds" for R8A7744 (RZ/G1N) compatible LVDS encoders

  - "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders

  - "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders

  - "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders

drivers/gpu/drm/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -81,7 +81,7 @@ obj-$(CONFIG_DRM_UDL) += udl/ 
obj-$(CONFIG_DRM_AST) += ast/

obj-$(CONFIG_DRM_ARMADA) += armada/

obj-$(CONFIG_DRM_ATMEL_HLCDC)	+= atmel-hlcdc/

obj-$(CONFIG_DRM_RCAR_DU) += rcar-du/

obj-y			+= rcar-du/

obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/

obj-y			+= omapdrm/

obj-$(CONFIG_DRM_SUN4I) += sun4i/

drivers/gpu/drm/rcar-du/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ config DRM_RCAR_DU 
	depends on DRM && OF

	depends on ARM || ARM64

	depends on ARCH_RENESAS || COMPILE_TEST

	imply DRM_RCAR_LVDS

	select DRM_KMS_HELPER

	select DRM_KMS_CMA_HELPER

	select DRM_GEM_CMA_HELPER

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

+34 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include "rcar_du_plane.h"

#include "rcar_du_regs.h"

#include "rcar_du_vsp.h"

#include "rcar_lvds.h"



static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)

{
@@ -656,8 +657,27 @@ static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, 
				       struct drm_crtc_state *old_state)

{

	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

	struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(crtc->state);

	struct rcar_du_device *rcdu = rcrtc->group->dev;



	rcar_du_crtc_get(rcrtc);



	/*

	 * On D3/E3 the dot clock is provided by the LVDS encoder attached to

	 * the DU channel. We need to enable its clock output explicitly if

	 * the LVDS output is disabled.

	 */

	if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) &&

	    rstate->outputs == BIT(RCAR_DU_OUTPUT_DPAD0)) {

		struct rcar_du_encoder *encoder =

			rcdu->encoders[RCAR_DU_OUTPUT_LVDS0 + rcrtc->index];

		const struct drm_display_mode *mode =

			&crtc->state->adjusted_mode;



		rcar_lvds_clk_enable(encoder->base.bridge,

				     mode->clock * 1000);

	}



	rcar_du_crtc_start(rcrtc);

}
@@ -665,10 +685,24 @@ static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, 
					struct drm_crtc_state *old_state)

{

	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);

	struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(old_state);

	struct rcar_du_device *rcdu = rcrtc->group->dev;



	rcar_du_crtc_stop(rcrtc);

	rcar_du_crtc_put(rcrtc);



	if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) &&

	    rstate->outputs == BIT(RCAR_DU_OUTPUT_DPAD0)) {

		struct rcar_du_encoder *encoder =

			rcdu->encoders[RCAR_DU_OUTPUT_LVDS0 + rcrtc->index];



		/*

		 * Disable the LVDS clock output, see

		 * rcar_du_crtc_atomic_enable().

		 */

		rcar_lvds_clk_disable(encoder->base.bridge);

	}



	spin_lock_irq(&crtc->dev->event_lock);

	if (crtc->state->event) {

		drm_crtc_send_vblank_event(crtc, crtc->state->event);

drivers/gpu/drm/rcar-du/rcar_du_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ struct device; 
struct drm_device;

struct drm_property;

struct rcar_du_device;

struct rcar_du_encoder;



#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK	BIT(0)	/* Per-CRTC IRQ and clock */

#define RCAR_DU_FEATURE_VSP1_SOURCE	BIT(1)	/* Has inputs from VSP1 */
@@ -81,6 +82,8 @@ struct rcar_du_device { 
	struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS];

	unsigned int num_crtcs;



	struct rcar_du_encoder *encoders[RCAR_DU_OUTPUT_MAX];



	struct rcar_du_group groups[RCAR_DU_MAX_GROUPS];

	struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS];