Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0ad5c6b3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-microcode-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 microcode changes from Ingo Molnar:
 "Microcode driver updates: mostly cleanups but also some fixes
  (Borislav Petkov)"

* 'x86-microcode-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/microcode/amd: Drop the pci_ids.h dependency
  x86/microcode/intel: Fix printing of microcode blobs in show_saved_mc()
  x86/microcode/intel: Check scan_microcode()'s retval
  x86/microcode/intel: Sanitize microcode_pointer()
  x86/microcode/intel: Move mc arg last in get_matching_{microcode|sig}
  x86/microcode/intel: Simplify generic_load_microcode_early()
  x86/microcode: Consolidate family,model, ... code
  x86/microcode/intel: Rename update_match_revision()
  x86/microcode/intel: Sanitize _save_mc()
  x86/microcode/intel: Make _save_mc() return the updated saved count
  x86/microcode/intel: Simplify load_ucode_intel_bsp()
  x86/microcode/intel: Get rid of last arg to load_ucode_intel_bsp()
  x86/microcode/intel: Do the mc_saved_src NULL check first
  x86/microcode/intel: Check if microcode was found before applying
  x86/microcode/intel: Fix out of bounds memory access to the extended header
parents 421ec901 46423ffa

arch/x86/include/asm/microcode.h

+73 −0
Original line number Diff line number Diff line
@@ -75,6 +75,79 @@ static inline void __exit exit_amd_microcode(void) {} 


#ifdef CONFIG_MICROCODE_EARLY

#define MAX_UCODE_COUNT 128



#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))

#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')

#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')

#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')

#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')

#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')

#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')



#define CPUID_IS(a, b, c, ebx, ecx, edx)	\

		(!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))



/*

 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.

 * x86_vendor() gets vendor id for BSP.

 *

 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify

 * coding, we still use x86_vendor() to get vendor id for AP.

 *

 * x86_vendor() gets vendor information directly from CPUID.

 */

static inline int x86_vendor(void)

{

	u32 eax = 0x00000000;

	u32 ebx, ecx = 0, edx;



	native_cpuid(&eax, &ebx, &ecx, &edx);



	if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))

		return X86_VENDOR_INTEL;



	if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))

		return X86_VENDOR_AMD;



	return X86_VENDOR_UNKNOWN;

}



static inline unsigned int __x86_family(unsigned int sig)

{

	unsigned int x86;



	x86 = (sig >> 8) & 0xf;



	if (x86 == 0xf)

		x86 += (sig >> 20) & 0xff;



	return x86;

}



static inline unsigned int x86_family(void)

{

	u32 eax = 0x00000001;

	u32 ebx, ecx = 0, edx;



	native_cpuid(&eax, &ebx, &ecx, &edx);



	return __x86_family(eax);

}



static inline unsigned int x86_model(unsigned int sig)

{

	unsigned int x86, model;



	x86 = __x86_family(sig);



	model = (sig >> 4) & 0xf;



	if (x86 == 0x6 || x86 == 0xf)

		model += ((sig >> 16) & 0xf) << 4;



	return model;

}



extern void __init load_ucode_bsp(void);

extern void load_ucode_ap(void);

extern int __init save_microcode_in_initrd(void);

arch/x86/include/asm/microcode_intel.h

+8 −5
Original line number Diff line number Diff line
@@ -56,12 +56,15 @@ struct extended_sigtable { 


#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)



extern int

get_matching_microcode(unsigned int csig, int cpf, void *mc, int rev);

extern int get_matching_microcode(unsigned int csig, int cpf, int rev, void *mc);

extern int microcode_sanity_check(void *mc, int print_err);

extern int get_matching_sig(unsigned int csig, int cpf, void *mc, int rev);

extern int

update_match_revision(struct microcode_header_intel *mc_header, int rev);

extern int get_matching_sig(unsigned int csig, int cpf, int rev, void *mc);



static inline int

revision_is_newer(struct microcode_header_intel *mc_header, int rev)

{

	return (mc_header->rev <= rev) ? 0 : 1;

}



#ifdef CONFIG_MICROCODE_INTEL_EARLY

extern void __init load_ucode_intel_bsp(void);

arch/x86/kernel/cpu/microcode/amd.c

+0 −1
Original line number Diff line number Diff line
@@ -21,7 +21,6 @@ 
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt



#include <linux/firmware.h>

#include <linux/pci_ids.h>

#include <linux/uaccess.h>

#include <linux/vmalloc.h>

#include <linux/kernel.h>

arch/x86/kernel/cpu/microcode/core_early.c

+12 −63
Original line number Diff line number Diff line
@@ -23,57 +23,6 @@ 
#include <asm/processor.h>

#include <asm/cmdline.h>



#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))

#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')

#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')

#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')

#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')

#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')

#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')



#define CPUID_IS(a, b, c, ebx, ecx, edx)	\

		(!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))



/*

 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.

 * x86_vendor() gets vendor id for BSP.

 *

 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify

 * coding, we still use x86_vendor() to get vendor id for AP.

 *

 * x86_vendor() gets vendor information directly through cpuid.

 */

static int x86_vendor(void)

{

	u32 eax = 0x00000000;

	u32 ebx, ecx = 0, edx;



	native_cpuid(&eax, &ebx, &ecx, &edx);



	if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))

		return X86_VENDOR_INTEL;



	if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))

		return X86_VENDOR_AMD;



	return X86_VENDOR_UNKNOWN;

}



static int x86_family(void)

{

	u32 eax = 0x00000001;

	u32 ebx, ecx = 0, edx;

	int x86;



	native_cpuid(&eax, &ebx, &ecx, &edx);



	x86 = (eax >> 8) & 0xf;

	if (x86 == 15)

		x86 += (eax >> 20) & 0xff;



	return x86;

}



static bool __init check_loader_disabled_bsp(void)

{

#ifdef CONFIG_X86_32
@@ -96,7 +45,7 @@ static bool __init check_loader_disabled_bsp(void) 


void __init load_ucode_bsp(void)

{

	int vendor, x86;

	int vendor, family;



	if (check_loader_disabled_bsp())

		return;
@@ -105,15 +54,15 @@ void __init load_ucode_bsp(void) 
		return;



	vendor = x86_vendor();

	x86 = x86_family();

	family = x86_family();



	switch (vendor) {

	case X86_VENDOR_INTEL:

		if (x86 >= 6)

		if (family >= 6)

			load_ucode_intel_bsp();

		break;

	case X86_VENDOR_AMD:

		if (x86 >= 0x10)

		if (family >= 0x10)

			load_ucode_amd_bsp();

		break;

	default:
@@ -132,7 +81,7 @@ static bool check_loader_disabled_ap(void) 


void load_ucode_ap(void)

{

	int vendor, x86;

	int vendor, family;



	if (check_loader_disabled_ap())

		return;
@@ -141,15 +90,15 @@ void load_ucode_ap(void) 
		return;



	vendor = x86_vendor();

	x86 = x86_family();

	family = x86_family();



	switch (vendor) {

	case X86_VENDOR_INTEL:

		if (x86 >= 6)

		if (family >= 6)

			load_ucode_intel_ap();

		break;

	case X86_VENDOR_AMD:

		if (x86 >= 0x10)

		if (family >= 0x10)

			load_ucode_amd_ap();

		break;

	default:
@@ -179,18 +128,18 @@ int __init save_microcode_in_initrd(void) 


void reload_early_microcode(void)

{

	int vendor, x86;

	int vendor, family;



	vendor = x86_vendor();

	x86 = x86_family();

	family = x86_family();



	switch (vendor) {

	case X86_VENDOR_INTEL:

		if (x86 >= 6)

		if (family >= 6)

			reload_ucode_intel();

		break;

	case X86_VENDOR_AMD:

		if (x86 >= 0x10)

		if (family >= 0x10)

			reload_ucode_amd();

		break;

	default:

arch/x86/kernel/cpu/microcode/intel.c

+2 −2
Original line number Diff line number Diff line
@@ -124,7 +124,7 @@ static int get_matching_mc(struct microcode_intel *mc_intel, int cpu) 
	cpf = cpu_sig.pf;

	crev = cpu_sig.rev;



	return get_matching_microcode(csig, cpf, mc_intel, crev);

	return get_matching_microcode(csig, cpf, crev, mc_intel);

}



static int apply_microcode_intel(int cpu)
@@ -226,7 +226,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, 


		csig = uci->cpu_sig.sig;

		cpf = uci->cpu_sig.pf;

		if (get_matching_microcode(csig, cpf, mc, new_rev)) {

		if (get_matching_microcode(csig, cpf, new_rev, mc)) {

			vfree(new_mc);

			new_rev = mc_header.rev;

			new_mc  = mc;