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Commit 0aa052ce authored by Dan Haab's avatar Dan Haab Committed by Florian Fainelli
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ARM: dts: BCM53573: Add DT for Luxul XAP-810



This is BCM53573 WiSoC based access point with an extra BCM43217 chipset
used for 2.4 GHz.

Signed-off-by: default avatarDan Haab <dhaab@luxul.com>
Acked-by: default avatarRafał Miłecki <rafal@milecki.pl>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 65f78c4c
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+1 −0
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@@ -110,6 +110,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
	bcm953012hr.dtb \
	bcm953012k.dtb
dtb-$(CONFIG_ARCH_BCM_53573) += \
	bcm47189-luxul-xap-810.dtb \
	bcm47189-tenda-ac9.dtb \
	bcm947189acdbmr.dtb
dtb-$(CONFIG_ARCH_BCM_63XX) += \
+87 −0
Original line number Diff line number Diff line
/*
 * Copyright 2017 Luxul Inc.
 *
 * Licensed under the ISC license.
 */

/dts-v1/;

#include "bcm53573.dtsi"

/ {
	compatible = "luxul,xap-810-v1", "brcm,bcm47189", "brcm,bcm53573";
	model = "Luxul XAP-810 V1";

	chosen {
		bootargs = "earlycon";
	};

	memory {
		reg = <0x00000000 0x08000000>;
	};

	leds {
		compatible = "gpio-leds";

		5ghz {
			label = "bcm53xx:blue:5ghz";
			gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "default-off";
		};

		system {
			label = "bcm53xx:green:system";
			gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "timer";
		};
	};

	pcie0_leds {
		compatible = "gpio-leds";

		2ghz {
			label = "bcm53xx:blue:2ghz";
			gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "default-off";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;

		restart {
			label = "Reset";
			linux,code = <KEY_RESTART>;
			gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
		};
	};
};

&pcie0 {
	ranges = <0x00000000 0 0 0 0 0x00100000>;
	#address-cells = <3>;
	#size-cells = <2>;

	bridge@0,0,0 {
		reg = <0x0000 0 0 0 0>;
		ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
		#address-cells = <3>;
		#size-cells = <2>;

		wifi@0,1,0 {
			reg = <0x0000 0 0 0 0>;
			ranges = <0x00000000 0 0 0 0x00100000>;
			#address-cells = <1>;
			#size-cells = <1>;

			pcie0_chipcommon: chipcommon@0 {
				reg = <0 0x1000>;

				gpio-controller;
				#gpio-cells = <2>;
			};
		};
	};
};