Loading drivers/gpu/drm/nouveau/include/nvkm/core/device.h +3 −0 Original line number Diff line number Diff line Loading @@ -4,6 +4,7 @@ #include <core/object.h> enum nvkm_devidx { NVKM_SUBDEV_PCI, NVKM_SUBDEV_VBIOS, NVKM_SUBDEV_DEVINIT, NVKM_SUBDEV_IBUS, Loading Loading @@ -108,6 +109,7 @@ struct nvkm_device { struct nvkm_mc *mc; struct nvkm_mmu *mmu; struct nvkm_subdev *mxm; struct nvkm_pci *pci; struct nvkm_pmu *pmu; struct nvkm_therm *therm; struct nvkm_timer *timer; Loading Loading @@ -168,6 +170,7 @@ struct nvkm_device_chip { int (*mc )(struct nvkm_device *, int idx, struct nvkm_mc **); int (*mmu )(struct nvkm_device *, int idx, struct nvkm_mmu **); int (*mxm )(struct nvkm_device *, int idx, struct nvkm_subdev **); int (*pci )(struct nvkm_device *, int idx, struct nvkm_pci **); int (*pmu )(struct nvkm_device *, int idx, struct nvkm_pmu **); int (*therm )(struct nvkm_device *, int idx, struct nvkm_therm **); int (*timer )(struct nvkm_device *, int idx, struct nvkm_timer **); Loading drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h 0 → 100644 +21 −0 Original line number Diff line number Diff line #ifndef __NVKM_PCI_H__ #define __NVKM_PCI_H__ #include <core/subdev.h> struct nvkm_pci { const struct nvkm_pci_func *func; struct nvkm_subdev subdev; }; u32 nvkm_pci_rd32(struct nvkm_pci *, u16 addr); void nvkm_pci_wr08(struct nvkm_pci *, u16 addr, u8 data); void nvkm_pci_wr32(struct nvkm_pci *, u16 addr, u32 data); void nvkm_pci_rom_shadow(struct nvkm_pci *, bool shadow); void nvkm_pci_msi_rearm(struct nvkm_pci *); int nv04_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int nv50_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **); #endif drivers/gpu/drm/nouveau/nvkm/core/subdev.c +1 −0 Original line number Diff line number Diff line Loading @@ -44,6 +44,7 @@ nvkm_subdev_name[NVKM_SUBDEV_NR] = { [NVKM_SUBDEV_MC ] = "mc", [NVKM_SUBDEV_MMU ] = "mmu", [NVKM_SUBDEV_MXM ] = "mxm", [NVKM_SUBDEV_PCI ] = "pci", [NVKM_SUBDEV_PMU ] = "pmu", [NVKM_SUBDEV_THERM ] = "therm", [NVKM_SUBDEV_TIMER ] = "tmr", Loading drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +96 −28 Original line number Diff line number Diff line Loading @@ -85,6 +85,7 @@ nv4_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -105,6 +106,7 @@ nv5_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -126,6 +128,7 @@ nv10_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -145,6 +148,7 @@ nv11_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -166,6 +170,7 @@ nv15_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -187,6 +192,7 @@ nv17_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -208,6 +214,7 @@ nv18_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -229,6 +236,7 @@ nv1a_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -250,6 +258,7 @@ nv1f_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -271,6 +280,7 @@ nv20_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -292,6 +302,7 @@ nv25_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -313,6 +324,7 @@ nv28_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -334,6 +346,7 @@ nv2a_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -355,6 +368,7 @@ nv30_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -376,6 +390,7 @@ nv31_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -398,6 +413,7 @@ nv34_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -420,6 +436,7 @@ nv35_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -441,6 +458,7 @@ nv36_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -463,6 +481,7 @@ nv40_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv04_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv40_timer_new, .volt = nv40_volt_new, Loading @@ -488,6 +507,7 @@ nv41_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -513,6 +533,7 @@ nv42_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -538,6 +559,7 @@ nv43_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -563,6 +585,7 @@ nv44_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -588,6 +611,7 @@ nv45_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv04_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -613,6 +637,7 @@ nv46_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -638,6 +663,7 @@ nv47_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -663,6 +689,7 @@ nv49_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -688,6 +715,7 @@ nv4a_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -713,6 +741,7 @@ nv4b_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -738,6 +767,7 @@ nv4c_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -763,6 +793,7 @@ nv4e_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -791,6 +822,7 @@ nv50_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv50_pci_new, .therm = nv50_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -816,6 +848,7 @@ nv63_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -841,6 +874,7 @@ nv67_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -866,6 +900,7 @@ nv68_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -894,6 +929,7 @@ nv84_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv50_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -925,6 +961,7 @@ nv86_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv50_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -956,6 +993,7 @@ nv92_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv50_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -987,6 +1025,7 @@ nv94_chipset = { .mc = g94_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -1005,63 +1044,65 @@ nv94_chipset = { static const struct nvkm_device_chip nv96_chipset = { .name = "G96", .bar = g84_bar_new, .bios = nvkm_bios_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, .fuse = nv50_fuse_new, .bus = g94_bus_new, .clk = g84_clk_new, .therm = g84_therm_new, .mxm = nv50_mxm_new, .devinit = g84_devinit_new, .mc = g94_mc_new, .bus = g94_bus_new, .timer = nv41_timer_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g94_mc_new, .mmu = nv50_mmu_new, .bar = g84_bar_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, .cipher = g84_cipher_new, .disp = g94_disp_new, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, .gr = nv50_gr_new, .mpeg = g84_mpeg_new, .vp = g84_vp_new, .cipher = g84_cipher_new, .bsp = g84_bsp_new, .disp = g94_disp_new, .pm = g84_pm_new, .sw = nv50_sw_new, .vp = g84_vp_new, }; static const struct nvkm_device_chip nv98_chipset = { .name = "G98", .bar = g84_bar_new, .bios = nvkm_bios_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, .fuse = nv50_fuse_new, .bus = g94_bus_new, .clk = g84_clk_new, .therm = g84_therm_new, .mxm = nv50_mxm_new, .devinit = g98_devinit_new, .mc = g98_mc_new, .bus = g94_bus_new, .timer = nv41_timer_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, .mmu = nv50_mmu_new, .bar = g84_bar_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, .disp = g94_disp_new, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, .sw = nv50_sw_new, .mspdec = g98_mspdec_new, .sec = g98_sec_new, .msvld = g98_msvld_new, .msppp = g98_msppp_new, .disp = g94_disp_new, .msvld = g98_msvld_new, .pm = g84_pm_new, .sec = g98_sec_new, .sw = nv50_sw_new, }; static const struct nvkm_device_chip Loading @@ -1080,6 +1121,7 @@ nva0_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -1111,6 +1153,7 @@ nva3_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gt215_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1144,6 +1187,7 @@ nva5_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gt215_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1176,6 +1220,7 @@ nva8_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gt215_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1208,6 +1253,7 @@ nvaa_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -1239,6 +1285,7 @@ nvac_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -1270,6 +1317,7 @@ nvaf_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gt215_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1304,6 +1352,7 @@ nvc0_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1339,6 +1388,7 @@ nvc1_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1373,6 +1423,7 @@ nvc3_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1407,6 +1458,7 @@ nvc4_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1442,6 +1494,7 @@ nvc8_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1477,6 +1530,7 @@ nvce_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1512,6 +1566,7 @@ nvcf_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1546,6 +1601,7 @@ nvd7_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = gf119_therm_new, .timer = nv41_timer_new, .ce[0] = gf100_ce_new, Loading Loading @@ -1578,6 +1634,7 @@ nvd9_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf119_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1612,6 +1669,7 @@ nve4_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk104_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1648,6 +1706,7 @@ nve6_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk104_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1684,6 +1743,7 @@ nve7_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf119_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1744,6 +1804,7 @@ nvf0_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk110_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1779,6 +1840,7 @@ nvf1_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk110_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1814,6 +1876,7 @@ nv106_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk208_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1849,6 +1912,7 @@ nv108_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk208_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1884,6 +1948,7 @@ nv117_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gm107_pmu_new, .therm = gm107_therm_new, .timer = gk20a_timer_new, Loading Loading @@ -1913,6 +1978,7 @@ nv124_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, .ce[0] = gm204_ce_new, Loading Loading @@ -1942,6 +2008,7 @@ nv126_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, .ce[0] = gm204_ce_new, Loading @@ -1966,7 +2033,6 @@ nv12b_chipset = { .ltc = gm107_ltc_new, .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mmu = gf100_mmu_new, .timer = gk20a_timer_new, .ce[2] = gm204_ce_new, .dma = gf119_dma_new, Loading Loading @@ -2018,6 +2084,7 @@ nvkm_device_subdev(struct nvkm_device *device, int index) _(MC , device->mc , &device->mc->subdev); _(MMU , device->mmu , &device->mmu->subdev); _(MXM , device->mxm , device->mxm); _(PCI , device->pci , &device->pci->subdev); _(PMU , device->pmu , &device->pmu->subdev); _(THERM , device->therm , &device->therm->subdev); _(TIMER , device->timer , &device->timer->subdev); Loading Loading @@ -2504,6 +2571,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, _(NVKM_SUBDEV_MC , mc); _(NVKM_SUBDEV_MMU , mmu); _(NVKM_SUBDEV_MXM , mxm); _(NVKM_SUBDEV_PCI , pci); _(NVKM_SUBDEV_PMU , pmu); _(NVKM_SUBDEV_THERM , therm); _(NVKM_SUBDEV_TIMER , timer); Loading drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h +1 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ #include <subdev/mc.h> #include <subdev/mmu.h> #include <subdev/mxm.h> #include <subdev/pci.h> #include <subdev/pmu.h> #include <subdev/therm.h> #include <subdev/timer.h> Loading Loading
drivers/gpu/drm/nouveau/include/nvkm/core/device.h +3 −0 Original line number Diff line number Diff line Loading @@ -4,6 +4,7 @@ #include <core/object.h> enum nvkm_devidx { NVKM_SUBDEV_PCI, NVKM_SUBDEV_VBIOS, NVKM_SUBDEV_DEVINIT, NVKM_SUBDEV_IBUS, Loading Loading @@ -108,6 +109,7 @@ struct nvkm_device { struct nvkm_mc *mc; struct nvkm_mmu *mmu; struct nvkm_subdev *mxm; struct nvkm_pci *pci; struct nvkm_pmu *pmu; struct nvkm_therm *therm; struct nvkm_timer *timer; Loading Loading @@ -168,6 +170,7 @@ struct nvkm_device_chip { int (*mc )(struct nvkm_device *, int idx, struct nvkm_mc **); int (*mmu )(struct nvkm_device *, int idx, struct nvkm_mmu **); int (*mxm )(struct nvkm_device *, int idx, struct nvkm_subdev **); int (*pci )(struct nvkm_device *, int idx, struct nvkm_pci **); int (*pmu )(struct nvkm_device *, int idx, struct nvkm_pmu **); int (*therm )(struct nvkm_device *, int idx, struct nvkm_therm **); int (*timer )(struct nvkm_device *, int idx, struct nvkm_timer **); Loading
drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h 0 → 100644 +21 −0 Original line number Diff line number Diff line #ifndef __NVKM_PCI_H__ #define __NVKM_PCI_H__ #include <core/subdev.h> struct nvkm_pci { const struct nvkm_pci_func *func; struct nvkm_subdev subdev; }; u32 nvkm_pci_rd32(struct nvkm_pci *, u16 addr); void nvkm_pci_wr08(struct nvkm_pci *, u16 addr, u8 data); void nvkm_pci_wr32(struct nvkm_pci *, u16 addr, u32 data); void nvkm_pci_rom_shadow(struct nvkm_pci *, bool shadow); void nvkm_pci_msi_rearm(struct nvkm_pci *); int nv04_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int nv50_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **); #endif
drivers/gpu/drm/nouveau/nvkm/core/subdev.c +1 −0 Original line number Diff line number Diff line Loading @@ -44,6 +44,7 @@ nvkm_subdev_name[NVKM_SUBDEV_NR] = { [NVKM_SUBDEV_MC ] = "mc", [NVKM_SUBDEV_MMU ] = "mmu", [NVKM_SUBDEV_MXM ] = "mxm", [NVKM_SUBDEV_PCI ] = "pci", [NVKM_SUBDEV_PMU ] = "pmu", [NVKM_SUBDEV_THERM ] = "therm", [NVKM_SUBDEV_TIMER ] = "tmr", Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +96 −28 Original line number Diff line number Diff line Loading @@ -85,6 +85,7 @@ nv4_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -105,6 +106,7 @@ nv5_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -126,6 +128,7 @@ nv10_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -145,6 +148,7 @@ nv11_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -166,6 +170,7 @@ nv15_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -187,6 +192,7 @@ nv17_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -208,6 +214,7 @@ nv18_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -229,6 +236,7 @@ nv1a_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -250,6 +258,7 @@ nv1f_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -271,6 +280,7 @@ nv20_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -292,6 +302,7 @@ nv25_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -313,6 +324,7 @@ nv28_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -334,6 +346,7 @@ nv2a_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -355,6 +368,7 @@ nv30_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -376,6 +390,7 @@ nv31_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -398,6 +413,7 @@ nv34_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -420,6 +436,7 @@ nv35_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -441,6 +458,7 @@ nv36_chipset = { .imem = nv04_instmem_new, .mc = nv04_mc_new, .mmu = nv04_mmu_new, .pci = nv04_pci_new, .timer = nv04_timer_new, .disp = nv04_disp_new, .dma = nv04_dma_new, Loading @@ -463,6 +481,7 @@ nv40_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv04_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv40_timer_new, .volt = nv40_volt_new, Loading @@ -488,6 +507,7 @@ nv41_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -513,6 +533,7 @@ nv42_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -538,6 +559,7 @@ nv43_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -563,6 +585,7 @@ nv44_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -588,6 +611,7 @@ nv45_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv04_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -613,6 +637,7 @@ nv46_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -638,6 +663,7 @@ nv47_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -663,6 +689,7 @@ nv49_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -688,6 +715,7 @@ nv4a_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -713,6 +741,7 @@ nv4b_chipset = { .imem = nv40_instmem_new, .mc = nv40_mc_new, .mmu = nv41_mmu_new, .pci = nv40_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -738,6 +767,7 @@ nv4c_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -763,6 +793,7 @@ nv4e_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -791,6 +822,7 @@ nv50_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv50_pci_new, .therm = nv50_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -816,6 +848,7 @@ nv63_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -841,6 +874,7 @@ nv67_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -866,6 +900,7 @@ nv68_chipset = { .imem = nv40_instmem_new, .mc = nv4c_mc_new, .mmu = nv44_mmu_new, .pci = nv4c_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -894,6 +929,7 @@ nv84_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv50_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -925,6 +961,7 @@ nv86_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv50_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -956,6 +993,7 @@ nv92_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv50_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -987,6 +1025,7 @@ nv94_chipset = { .mc = g94_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading @@ -1005,63 +1044,65 @@ nv94_chipset = { static const struct nvkm_device_chip nv96_chipset = { .name = "G96", .bar = g84_bar_new, .bios = nvkm_bios_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, .fuse = nv50_fuse_new, .bus = g94_bus_new, .clk = g84_clk_new, .therm = g84_therm_new, .mxm = nv50_mxm_new, .devinit = g84_devinit_new, .mc = g94_mc_new, .bus = g94_bus_new, .timer = nv41_timer_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g94_mc_new, .mmu = nv50_mmu_new, .bar = g84_bar_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, .cipher = g84_cipher_new, .disp = g94_disp_new, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, .gr = nv50_gr_new, .mpeg = g84_mpeg_new, .vp = g84_vp_new, .cipher = g84_cipher_new, .bsp = g84_bsp_new, .disp = g94_disp_new, .pm = g84_pm_new, .sw = nv50_sw_new, .vp = g84_vp_new, }; static const struct nvkm_device_chip nv98_chipset = { .name = "G98", .bar = g84_bar_new, .bios = nvkm_bios_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, .fuse = nv50_fuse_new, .bus = g94_bus_new, .clk = g84_clk_new, .therm = g84_therm_new, .mxm = nv50_mxm_new, .devinit = g98_devinit_new, .mc = g98_mc_new, .bus = g94_bus_new, .timer = nv41_timer_new, .fb = g84_fb_new, .fuse = nv50_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .mc = g98_mc_new, .mmu = nv50_mmu_new, .bar = g84_bar_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, .disp = g94_disp_new, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, .sw = nv50_sw_new, .mspdec = g98_mspdec_new, .sec = g98_sec_new, .msvld = g98_msvld_new, .msppp = g98_msppp_new, .disp = g94_disp_new, .msvld = g98_msvld_new, .pm = g84_pm_new, .sec = g98_sec_new, .sw = nv50_sw_new, }; static const struct nvkm_device_chip Loading @@ -1080,6 +1121,7 @@ nva0_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -1111,6 +1153,7 @@ nva3_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gt215_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1144,6 +1187,7 @@ nva5_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gt215_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1176,6 +1220,7 @@ nva8_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gt215_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1208,6 +1253,7 @@ nvaa_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -1239,6 +1285,7 @@ nvac_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, Loading Loading @@ -1270,6 +1317,7 @@ nvaf_chipset = { .mc = g98_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gt215_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1304,6 +1352,7 @@ nvc0_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1339,6 +1388,7 @@ nvc1_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1373,6 +1423,7 @@ nvc3_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1407,6 +1458,7 @@ nvc4_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1442,6 +1494,7 @@ nvc8_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1477,6 +1530,7 @@ nvce_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1512,6 +1566,7 @@ nvcf_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1546,6 +1601,7 @@ nvd7_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .therm = gf119_therm_new, .timer = nv41_timer_new, .ce[0] = gf100_ce_new, Loading Loading @@ -1578,6 +1634,7 @@ nvd9_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf119_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1612,6 +1669,7 @@ nve4_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk104_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1648,6 +1706,7 @@ nve6_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk104_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1684,6 +1743,7 @@ nve7_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gf119_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1744,6 +1804,7 @@ nvf0_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk110_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1779,6 +1840,7 @@ nvf1_chipset = { .mc = gf106_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk110_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1814,6 +1876,7 @@ nv106_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk208_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1849,6 +1912,7 @@ nv108_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gk208_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, Loading Loading @@ -1884,6 +1948,7 @@ nv117_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gm107_pmu_new, .therm = gm107_therm_new, .timer = gk20a_timer_new, Loading Loading @@ -1913,6 +1978,7 @@ nv124_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, .ce[0] = gm204_ce_new, Loading Loading @@ -1942,6 +2008,7 @@ nv126_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, .pci = nv40_pci_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, .ce[0] = gm204_ce_new, Loading @@ -1966,7 +2033,6 @@ nv12b_chipset = { .ltc = gm107_ltc_new, .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mmu = gf100_mmu_new, .timer = gk20a_timer_new, .ce[2] = gm204_ce_new, .dma = gf119_dma_new, Loading Loading @@ -2018,6 +2084,7 @@ nvkm_device_subdev(struct nvkm_device *device, int index) _(MC , device->mc , &device->mc->subdev); _(MMU , device->mmu , &device->mmu->subdev); _(MXM , device->mxm , device->mxm); _(PCI , device->pci , &device->pci->subdev); _(PMU , device->pmu , &device->pmu->subdev); _(THERM , device->therm , &device->therm->subdev); _(TIMER , device->timer , &device->timer->subdev); Loading Loading @@ -2504,6 +2571,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, _(NVKM_SUBDEV_MC , mc); _(NVKM_SUBDEV_MMU , mmu); _(NVKM_SUBDEV_MXM , mxm); _(NVKM_SUBDEV_PCI , pci); _(NVKM_SUBDEV_PMU , pmu); _(NVKM_SUBDEV_THERM , therm); _(NVKM_SUBDEV_TIMER , timer); Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h +1 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ #include <subdev/mc.h> #include <subdev/mmu.h> #include <subdev/mxm.h> #include <subdev/pci.h> #include <subdev/pmu.h> #include <subdev/therm.h> #include <subdev/timer.h> Loading