Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0a0fbbd6 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Greg Kroah-Hartman
Browse files

x86/mce: Deduplicate exception handling 



[ Upstream commit e42404afc4ca856c48f1e05752541faa3587c472 ]

Prepare code for further simplification. No functional change.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20210908132525.096452100@linutronix.de


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent b524137f

arch/x86/kernel/cpu/mce/core.c

+17 −17
Original line number Diff line number Diff line
@@ -397,13 +397,16 @@ static int msr_to_offset(u32 msr) 
	return -1;

}



__visible bool ex_handler_rdmsr_fault(const struct exception_table_entry *fixup,

				      struct pt_regs *regs, int trapnr,

				      unsigned long error_code,

				      unsigned long fault_addr)

static void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr)

{

	if (wrmsr) {

		pr_emerg("MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n",

			 (unsigned int)regs->cx, (unsigned int)regs->dx, (unsigned int)regs->ax,

			 regs->ip, (void *)regs->ip);

	} else {

		pr_emerg("MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)\n",

			 (unsigned int)regs->cx, regs->ip, (void *)regs->ip);

	}



	show_stack_regs(regs);
@@ -411,7 +414,14 @@ __visible bool ex_handler_rdmsr_fault(const struct exception_table_entry *fixup, 


	while (true)

		cpu_relax();

}



__visible bool ex_handler_rdmsr_fault(const struct exception_table_entry *fixup,

				      struct pt_regs *regs, int trapnr,

				      unsigned long error_code,

				      unsigned long fault_addr)

{

	ex_handler_msr_mce(regs, false);

	return true;

}
@@ -447,17 +457,7 @@ __visible bool ex_handler_wrmsr_fault(const struct exception_table_entry *fixup, 
				      unsigned long error_code,

				      unsigned long fault_addr)

{

	pr_emerg("MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n",

		 (unsigned int)regs->cx, (unsigned int)regs->dx, (unsigned int)regs->ax,

		  regs->ip, (void *)regs->ip);



	show_stack_regs(regs);



	panic("MCA architectural violation!\n");



	while (true)

		cpu_relax();



	ex_handler_msr_mce(regs, true);

	return true;

}