Loading drivers/platform/msm/ipa/ipa_v3/ipa.c +7 −5 Original line number Diff line number Diff line Loading @@ -3567,16 +3567,18 @@ static void ipa3_q6_avoid_holb(void) * setting HOLB on Q6 pipes, and from APPS perspective * they are not valid, therefore, the above function * will fail. * Also don't reset the HOLB timer to 0 for Q6 pipes. */ ipahal_write_reg_n_fields( IPA_ENDP_INIT_HOL_BLOCK_TIMER_n, ep_idx, &ep_holb); ipahal_write_reg_n_fields( IPA_ENDP_INIT_HOL_BLOCK_EN_n, ep_idx, &ep_holb); /* IPA4.5 issue requires HOLB_EN to be written twice */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5) /* For targets > IPA_4.0 issue requires HOLB_EN to * be written twice. */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) ipahal_write_reg_n_fields( IPA_ENDP_INIT_HOL_BLOCK_EN_n, ep_idx, &ep_holb); Loading drivers/platform/msm/ipa/ipa_v3/ipa_client.c +4 −2 Original line number Diff line number Diff line Loading @@ -1498,8 +1498,10 @@ int ipa3_set_reset_client_cons_pipe_sus_holb(bool set_reset, u32 tmr_val, IPA_ENDP_INIT_HOL_BLOCK_EN_n, pipe_idx, &ep_holb); /* IPA4.5 issue requires HOLB_EN to be written twice */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5) /* For targets > IPA_4.0 issue requires HOLB_EN to be * written twice. */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) ipahal_write_reg_n_fields( IPA_ENDP_INIT_HOL_BLOCK_EN_n, pipe_idx, &ep_holb); Loading drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +2 −2 Original line number Diff line number Diff line Loading @@ -6332,8 +6332,8 @@ int ipa3_cfg_ep_holb(u32 clnt_hdl, const struct ipa_ep_cfg_holb *ep_holb) ipa3_ctx->ep[clnt_hdl].holb.en = IPA_HOLB_TMR_EN; ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n, clnt_hdl, ep_holb); /* IPA4.5 issue requires HOLB_EN to be written twice */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5) /* For targets > IPA_4.0 issue requires HOLB_EN to be written twice */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n, clnt_hdl, ep_holb); Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa.c +7 −5 Original line number Diff line number Diff line Loading @@ -3567,16 +3567,18 @@ static void ipa3_q6_avoid_holb(void) * setting HOLB on Q6 pipes, and from APPS perspective * they are not valid, therefore, the above function * will fail. * Also don't reset the HOLB timer to 0 for Q6 pipes. */ ipahal_write_reg_n_fields( IPA_ENDP_INIT_HOL_BLOCK_TIMER_n, ep_idx, &ep_holb); ipahal_write_reg_n_fields( IPA_ENDP_INIT_HOL_BLOCK_EN_n, ep_idx, &ep_holb); /* IPA4.5 issue requires HOLB_EN to be written twice */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5) /* For targets > IPA_4.0 issue requires HOLB_EN to * be written twice. */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) ipahal_write_reg_n_fields( IPA_ENDP_INIT_HOL_BLOCK_EN_n, ep_idx, &ep_holb); Loading
drivers/platform/msm/ipa/ipa_v3/ipa_client.c +4 −2 Original line number Diff line number Diff line Loading @@ -1498,8 +1498,10 @@ int ipa3_set_reset_client_cons_pipe_sus_holb(bool set_reset, u32 tmr_val, IPA_ENDP_INIT_HOL_BLOCK_EN_n, pipe_idx, &ep_holb); /* IPA4.5 issue requires HOLB_EN to be written twice */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5) /* For targets > IPA_4.0 issue requires HOLB_EN to be * written twice. */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) ipahal_write_reg_n_fields( IPA_ENDP_INIT_HOL_BLOCK_EN_n, pipe_idx, &ep_holb); Loading
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +2 −2 Original line number Diff line number Diff line Loading @@ -6332,8 +6332,8 @@ int ipa3_cfg_ep_holb(u32 clnt_hdl, const struct ipa_ep_cfg_holb *ep_holb) ipa3_ctx->ep[clnt_hdl].holb.en = IPA_HOLB_TMR_EN; ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n, clnt_hdl, ep_holb); /* IPA4.5 issue requires HOLB_EN to be written twice */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5) /* For targets > IPA_4.0 issue requires HOLB_EN to be written twice */ if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n, clnt_hdl, ep_holb); Loading