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Commit 09bbf055 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab Committed by Jonathan Corbet
Browse files

docs: mic: convert docs to ReST and rename to *.rst



Convert Intel Many Integrated Core architecture docs to ReST.

The conversion is trivial: just add title and literal block
markups, and adjust some identation.

At its new index.rst, let's add a :orphan: while this is not linked to
the main index.rst file, in order to avoid build warnings.

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: default avatarJonathan Corbet <corbet@lwn.net>
parent d67297ad
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:orphan:

=============================================
Intel Many Integrated Core (MIC) architecture
=============================================

.. toctree::
    :maxdepth: 1

    mic_overview
    scif_overview

.. only::  subproject and html

   Indices
   =======

   * :ref:`genindex`
+5 −1
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======================================================
Intel Many Integrated Core (MIC) architecture overview
======================================================

An Intel MIC X100 device is a PCIe form factor add-in coprocessor
card based on the Intel Many Integrated Core (MIC) architecture
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
@@ -45,7 +49,7 @@ Here is a block diagram of the various components described above. The
virtio backends are situated on the host rather than the card given better
single threaded performance for the host compared to MIC, the ability of
the host to initiate DMA's to/from the card using the MIC DMA engine and
the fact that the virtio block storage backend can only be on the host.
the fact that the virtio block storage backend can only be on the host::

               +----------+           |             +----------+
               | Card OS  |           |             | Host OS  |
+34 −24
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========================================
Symmetric Communication Interface (SCIF)
========================================

The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a low
level communications API across PCIe currently implemented for MIC. Currently
SCIF provides inter-node communication within a single host platform, where a
@@ -8,8 +12,11 @@ is to deliver the maximum possible performance given the communication
abilities of the hardware. SCIF has been used to implement an offload compiler
runtime and OFED support for MPI implementations for MIC coprocessors.

==== SCIF API Components ====
SCIF API Components
===================

The SCIF API has the following parts:

1. Connection establishment using a client server model
2. Byte stream messaging intended for short messages
3. Node enumeration to determine online nodes
@@ -28,9 +35,12 @@ can also register local memory which is followed by data transfer using either
DMA, CPU copies or remote memory mapping via mmap. SCIF supports both user and
kernel mode clients which are functionally equivalent.

==== SCIF Performance for MIC ====
SCIF Performance for MIC
========================

DMA bandwidth comparison between the TCP (over ethernet over PCIe) stack versus
SCIF shows the performance advantages of SCIF for HPC applications and runtimes.
SCIF shows the performance advantages of SCIF for HPC applications and
runtimes::

             Comparison of TCP and SCIF based BW

@@ -66,7 +76,7 @@ space API similar to the kernel API in scif.h. The SCIF user space library
is distributed @ https://software.intel.com/en-us/mic-developer

Here is some pseudo code for an example of how two applications on two PCIe
nodes would typically use the SCIF API:
nodes would typically use the SCIF API::

  Process A (on node A)			Process B (on node B)