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Commit 09afaba1 authored by Kalle Valo's avatar Kalle Valo
Browse files
ath.git patches for 4.20. Major changes:

ath10k

* retrieve MAC address from system firmware if provided

* support extended board data download for dual-band QCA9984

* extended per sta tx statistics support via debugfs

* average ack rssi support for data frames

* speed up QCA6174 and QCA9377 firmware download using diag Copy Engine

* HTT High Latency mode support needed by SDIO and USB support

* get STA power save state via debugfs

ath9k

* add reset functionality for airtime station debugfs file
parents 4e6d4720 6df0580b
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+2 −1
Original line number Diff line number Diff line
@@ -42,7 +42,8 @@ config ATH10K_USB

config ATH10K_SNOC
	tristate "Qualcomm ath10k SNOC support (EXPERIMENTAL)"
	depends on ATH10K && ARCH_QCOM
	depends on ATH10K
	depends on ARCH_QCOM || COMPILE_TEST
	---help---
	  This module adds support for integrated WCN3990 chip connected
	  to system NOC(SNOC). Currently work in progress and will not
+5 −4
Original line number Diff line number Diff line
@@ -750,7 +750,7 @@ static int ath10k_ahb_probe(struct platform_device *pdev)
	enum ath10k_hw_rev hw_rev;
	size_t size;
	int ret;
	u32 chip_id;
	struct ath10k_bus_params bus_params;

	of_id = of_match_device(ath10k_ahb_of_match, &pdev->dev);
	if (!of_id) {
@@ -806,14 +806,15 @@ static int ath10k_ahb_probe(struct platform_device *pdev)

	ath10k_pci_ce_deinit(ar);

	chip_id = ath10k_ahb_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
	if (chip_id == 0xffffffff) {
	bus_params.dev_type = ATH10K_DEV_TYPE_LL;
	bus_params.chip_id = ath10k_ahb_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
	if (bus_params.chip_id == 0xffffffff) {
		ath10k_err(ar, "failed to get chip id\n");
		ret = -ENODEV;
		goto err_halt_device;
	}

	ret = ath10k_core_register(ar, chip_id);
	ret = ath10k_core_register(ar, &bus_params);
	if (ret) {
		ath10k_err(ar, "failed to register driver core: %d\n", ret);
		goto err_halt_device;
+23 −0
Original line number Diff line number Diff line
@@ -459,3 +459,26 @@ int ath10k_bmi_fast_download(struct ath10k *ar,

	return ret;
}

int ath10k_bmi_set_start(struct ath10k *ar, u32 address)
{
	struct bmi_cmd cmd;
	u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.set_app_start);
	int ret;

	if (ar->bmi.done_sent) {
		ath10k_warn(ar, "bmi set start command disallowed\n");
		return -EBUSY;
	}

	cmd.id = __cpu_to_le32(BMI_SET_APP_START);
	cmd.set_app_start.addr = __cpu_to_le32(address);

	ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, NULL, NULL);
	if (ret) {
		ath10k_warn(ar, "unable to set start to the device:%d\n", ret);
		return ret;
	}

	return 0;
}
+36 −0
Original line number Diff line number Diff line
@@ -86,6 +86,10 @@ enum bmi_cmd_id {
#define BMI_PARAM_GET_FLASH_BOARD_ID 0x8000
#define BMI_PARAM_FLASH_SECTION_ALL 0x10000

/* Dual-band Extended Board ID */
#define BMI_PARAM_GET_EXT_BOARD_ID 0x40000
#define ATH10K_BMI_EXT_BOARD_ID_SUPPORT 0x40000

#define ATH10K_BMI_BOARD_ID_FROM_OTP_MASK   0x7c00
#define ATH10K_BMI_BOARD_ID_FROM_OTP_LSB    10

@@ -93,6 +97,7 @@ enum bmi_cmd_id {
#define ATH10K_BMI_CHIP_ID_FROM_OTP_LSB     15

#define ATH10K_BMI_BOARD_ID_STATUS_MASK 0xff
#define ATH10K_BMI_EBOARD_ID_STATUS_MASK 0xff

struct bmi_cmd {
	__le32 id; /* enum bmi_cmd_id */
@@ -190,6 +195,35 @@ struct bmi_target_info {
	u32 type;
};

struct bmi_segmented_file_header {
	__le32 magic_num;
	__le32 file_flags;
	u8 data[];
};

struct bmi_segmented_metadata {
	__le32 addr;
	__le32 length;
	u8 data[];
};

#define BMI_SGMTFILE_MAGIC_NUM          0x544d4753 /* "SGMT" */
#define BMI_SGMTFILE_FLAG_COMPRESS      1

/* Special values for bmi_segmented_metadata.length (all have high bit set) */

/* end of segmented data */
#define BMI_SGMTFILE_DONE               0xffffffff

/* Board Data segment */
#define BMI_SGMTFILE_BDDATA             0xfffffffe

/* set beginning address */
#define BMI_SGMTFILE_BEGINADDR          0xfffffffd

/* immediate function execution */
#define BMI_SGMTFILE_EXEC               0xfffffffc

/* in jiffies */
#define BMI_COMMUNICATION_TIMEOUT_HZ (3 * HZ)

@@ -239,4 +273,6 @@ int ath10k_bmi_fast_download(struct ath10k *ar, u32 address,
			     const void *buffer, u32 length);
int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val);
int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val);
int ath10k_bmi_set_start(struct ath10k *ar, u32 address);

#endif /* _BMI_H_ */
+14 −4
Original line number Diff line number Diff line
@@ -1280,10 +1280,17 @@ static void ath10k_ce_per_engine_handler_adjust(struct ath10k_ce_pipe *ce_state)

int ath10k_ce_disable_interrupts(struct ath10k *ar)
{
	struct ath10k_ce *ce = ath10k_ce_priv(ar);
	struct ath10k_ce_pipe *ce_state;
	u32 ctrl_addr;
	int ce_id;

	for (ce_id = 0; ce_id < CE_COUNT; ce_id++) {
		u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);
		ce_state  = &ce->ce_states[ce_id];
		if (ce_state->attr_flags & CE_ATTR_POLL)
			continue;

		ctrl_addr = ath10k_ce_base_address(ar, ce_id);

		ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr);
		ath10k_ce_error_intr_disable(ar, ctrl_addr);
@@ -1300,11 +1307,14 @@ void ath10k_ce_enable_interrupts(struct ath10k *ar)
	int ce_id;
	struct ath10k_ce_pipe *ce_state;

	/* Skip the last copy engine, CE7 the diagnostic window, as that
	 * uses polling and isn't initialized for interrupts.
	/* Enable interrupts for copy engine that
	 * are not using polling mode.
	 */
	for (ce_id = 0; ce_id < CE_COUNT - 1; ce_id++) {
	for (ce_id = 0; ce_id < CE_COUNT; ce_id++) {
		ce_state  = &ce->ce_states[ce_id];
		if (ce_state->attr_flags & CE_ATTR_POLL)
			continue;

		ath10k_ce_per_engine_handler_adjust(ce_state);
	}
}
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