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Commit 09892aa1 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
Browse files

arm64: dts: imx8mm: add clock for GPIO node 



i.MX8MM has clock gate for each GPIO bank, add clock info
to GPIO node for clock management.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 53c6a2ec

arch/arm64/boot/dts/freescale/imx8mm.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -206,6 +206,7 @@ 
				reg = <0x30200000 0x10000>;

				interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MM_CLK_GPIO1_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -217,6 +218,7 @@ 
				reg = <0x30210000 0x10000>;

				interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MM_CLK_GPIO2_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -228,6 +230,7 @@ 
				reg = <0x30220000 0x10000>;

				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MM_CLK_GPIO3_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -239,6 +242,7 @@ 
				reg = <0x30230000 0x10000>;

				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MM_CLK_GPIO4_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -250,6 +254,7 @@ 
				reg = <0x30240000 0x10000>;

				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MM_CLK_GPIO5_ROOT>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;