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Commit 091df6cb authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: Switch intel_fb_align_height to fb format modifiers 



With this we can treat the fb format modifier completely independently
from the fencing mode in obj->tiling_mode in the initial plane code.
Which means new tiling modes without any gtt fence are now fully
support in the core i915 driver code.

v2: Also add pixel_format while at it, we need this to compute the
height for the new tiling formats.

Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parent 18c5247e

drivers/gpu/drm/i915/intel_display.c

+14 −6
Original line number Diff line number Diff line
@@ -2190,11 +2190,15 @@ static bool need_vtd_wa(struct drm_device *dev) 
}



int

intel_fb_align_height(struct drm_device *dev, int height, unsigned int tiling)

intel_fb_align_height(struct drm_device *dev, int height,

		      uint32_t pixel_format,

		      uint64_t fb_format_modifier)

{

	int tile_height;



	tile_height = tiling ? (IS_GEN2(dev) ? 16 : 8) : 1;

	tile_height = fb_format_modifier == I915_FORMAT_MOD_X_TILED ?

		(IS_GEN2(dev) ? 16 : 8) : 1;



	return ALIGN(height, tile_height);

}
@@ -6657,7 +6661,8 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc, 
	fb->pitches[0] = val & 0xffffffc0;



	aligned_height = intel_fb_align_height(dev, fb->height,

					       plane_config->tiling);

					       fb->pixel_format,

					       fb->modifier[0]);



	plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
@@ -7699,7 +7704,8 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, 
	fb->pitches[0] = (val & 0x3ff) * stride_mult;



	aligned_height = intel_fb_align_height(dev, fb->height,

					       plane_config->tiling);

					       fb->pixel_format,

					       fb->modifier[0]);



	plane_config->size = ALIGN(fb->pitches[0] * aligned_height, PAGE_SIZE);
@@ -7795,7 +7801,8 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc, 
	fb->pitches[0] = val & 0xffffffc0;



	aligned_height = intel_fb_align_height(dev, fb->height,

					       plane_config->tiling);

					       fb->pixel_format,

					       fb->modifier[0]);



	plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height);
@@ -12823,7 +12830,8 @@ static int intel_framebuffer_init(struct drm_device *dev, 
		return -EINVAL;



	aligned_height = intel_fb_align_height(dev, mode_cmd->height,

					       obj->tiling_mode);

					       mode_cmd->pixel_format,

					       mode_cmd->modifier[0]);

	/* FIXME drm helper for size checks (especially planar formats)? */

	if (obj->base.size < aligned_height * mode_cmd->pitches[0])

		return -EINVAL;

drivers/gpu/drm/i915/intel_drv.h

+2 −1
Original line number Diff line number Diff line
@@ -879,7 +879,8 @@ void intel_frontbuffer_flip(struct drm_device *dev, 
}



int intel_fb_align_height(struct drm_device *dev, int height,

			  unsigned int tiling);

			  uint32_t pixel_format,

			  uint64_t fb_format_modifier);

void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire);

drivers/gpu/drm/i915/intel_fbdev.c

+2 −1
Original line number Diff line number Diff line
@@ -594,7 +594,8 @@ static bool intel_fbdev_init_bios(struct drm_device *dev, 


		cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay;

		cur_size = intel_fb_align_height(dev, cur_size,

						 plane_config->tiling);

						 fb->base.pixel_format,

						 fb->base.modifier[0]);

		cur_size *= fb->base.pitches[0];

		DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n",

			      pipe_name(intel_crtc->pipe),