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Commit 083d2a07 authored by Ramalingam C's avatar Ramalingam C Committed by Daniel Vetter
Browse files

drm/i915: Fix GEN9 HDCP1.4 key load process 



HDCP1.4 key load process varies between Intel platform to platform.

For Gen9 platforms except BXT and GLK, HDCP1.4 key is loaded using
the GT Driver Mailbox interface. So all GEN9_BC platforms will use
the GT Driver Mailbox interface for HDCP1.4 key load.

v2:
  Using the IS_GEN9_BC for filtering the platforms [Ville]

Signed-off-by: default avatarRamalingam C <ramalingam.c@intel.com>
Reviewed-by: default avatarSean Paul <sean@poorly.run>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1544010283-20223-2-git-send-email-ramalingam.c@intel.com
parent 8d9d005d

drivers/gpu/drm/i915/intel_hdcp.c

+4 −3
Original line number Diff line number Diff line
@@ -157,10 +157,11 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv) 
	/*

	 * Initiate loading the HDCP key from fuses.

	 *

	 * BXT+ platforms, HDCP key needs to be loaded by SW. Only SKL and KBL

	 * differ in the key load trigger process from other platforms.

	 * BXT+ platforms, HDCP key needs to be loaded by SW. Only Gen 9

	 * platforms except BXT and GLK, differ in the key load trigger process

	 * from other platforms. So GEN9_BC uses the GT Driver Mailbox i/f.

	 */

	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {

	if (IS_GEN9_BC(dev_priv)) {

		mutex_lock(&dev_priv->pcu_lock);

		ret = sandybridge_pcode_write(dev_priv,

					      SKL_PCODE_LOAD_HDCP_KEYS, 1);