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Commit 07a05794 authored by Anant Goel's avatar Anant Goel
Browse files

ARM: dts: msm: Add PCIe clocks and regulators for the Direwolf VM 

Add the clocks and regulators required for PCIe functionality on the
Direwolf VM platform.

Change-Id: I0287846fe6de15ab1bc02967d2ed370bf47fadc5
parent 07b3f965

qcom/direwolf-vm.dtsi

+77 −0
Original line number Diff line number Diff line
@@ -206,6 +206,51 @@ 
			offset = <768>;

		};

	};



	VDD_CX_LEVEL:

	S1A0_LEVEL: pm8540_a0_s1_level: regulator-pm8540_a0-s1-level {

		compatible = "qcom,stub-regulator";

		regulator-name = "pm8540_a0_s1_level";

		regulator-min-microvolt =

			<RPMH_REGULATOR_LEVEL_RETENTION>;

		regulator-max-microvolt =

			<RPMH_REGULATOR_LEVEL_MAX>;

	};



	pcie_2a_pipe_clk: pcie_2a_pipe_clk {

		compatible = "fixed-clock";

		clock-frequency = <1000>;

		clock-output-names = "pcie_2a_pipe_clk";

		#clock-cells = <0>;

	};



	pcie_2b_pipe_clk: pcie_2b_pipe_clk {

		compatible = "fixed-clock";

		clock-frequency = <1000>;

		clock-output-names = "pcie_2b_pipe_clk";

		#clock-cells = <0>;

	};



	pcie_3a_pipe_clk: pcie_3a_pipe_clk {

		compatible = "fixed-clock";

		clock-frequency = <1000>;

		clock-output-names = "pcie_3a_pipe_clk";

		#clock-cells = <0>;

	};



	pcie_3b_pipe_clk: pcie_3b_pipe_clk {

		compatible = "fixed-clock";

		clock-frequency = <1000>;

		clock-output-names = "pcie_3b_pipe_clk";

		#clock-cells = <0>;

	};



	pcie_4_pipe_clk: pcie_4_pipe_clk {

		compatible = "fixed-clock";

		clock-frequency = <1000>;

		clock-output-names = "pcie_4_pipe_clk";

		#clock-cells = <0>;

	};

};



&regulator {
@@ -217,6 +262,32 @@ 
		regulator-name = "gcc_usb30_sec_gdsc";

	};



	gcc_pcie_2a_gdsc: gcc_pcie_2a_gdsc {

		regulator-name = "gcc_pcie_2a_gdsc";

	};



	gcc_pcie_2b_gdsc: gcc_pcie_2b_gdsc {

		regulator-name = "gcc_pcie_2b_gdsc";

	};



	gcc_pcie_3a_gdsc: gcc_pcie_3a_gdsc {

		regulator-name = "gcc_pcie_3a_gdsc";

	};



	gcc_pcie_3b_gdsc: gcc_pcie_3b_gdsc {

		regulator-name = "gcc_pcie_3b_gdsc";

	};



	gcc_pcie_4_gdsc: gcc_pcie_4_gdsc {

		regulator-name = "gcc_pcie_4_gdsc";

	};



	L3A0: pm8540_a0_l3: regulator-pm8540_a0-l3 {

		regulator-name = "ldoa3";

		regulator-min-microvolt = <1140000>;

		regulator-max-microvolt = <1260000>;

	};



	L5A0: pm8540_a0_l5: regulator-pm8540_a0-l5 {

		regulator-name = "ldoa5";

		regulator-min-microvolt = <720000>;
@@ -229,6 +300,12 @@ 
		regulator-max-microvolt = <1980000>;

	};



	L11A0: pm8540_a0_l11: regulator-pm8540_a0-l11 {

		regulator-name = "ldoa11";

		regulator-min-microvolt = <830000>;

		regulator-max-microvolt = <920000>;

	};



	L13A0: pm8540_a0_l13: regulator-pm8540_a0-l13 {

		regulator-name = "ldoa13";

		regulator-min-microvolt = <2970000>;