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Commit 06b49539 authored by Nitesh Gupta's avatar Nitesh Gupta Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add MHI register space info for PCIe on SM8150 

Add MHI register space information for PCIe so feature such as
displaying ASPM stats is possible on SM8150.

Change-Id: Ic16e20be3224ba2cdff337e72d9907b6bbbb2d1e
parent 3f937084

qcom/sm8150-pcie.dtsi

+8 −4
Original line number Diff line number Diff line
@@ -12,10 +12,12 @@ 
			<0x60001000 0x1000>,

			<0x60100000 0x100000>,

			<0x60200000 0x100000>,

			<0x60300000 0x3d00000>;

			<0x60300000 0x3d00000>,

			<0x01c06000 0x1000>;



		reg-names = "parf", "phy", "dm_core", "elbi",

				"iatu", "conf", "io", "bars";

				"iatu", "conf", "io", "bars",

				"mhi";



		#address-cells = <3>;

		#size-cells = <2>;
@@ -282,10 +284,12 @@ 
			<0x40001000 0x1000>,

			<0x40100000 0x100000>,

			<0x40200000 0x100000>,

			<0x40300000 0x1fd00000>;

			<0x40300000 0x1fd00000>,

			<0x01c0e000 0x1000>;



		reg-names = "parf", "phy", "dm_core", "elbi",

				"iatu", "conf", "io", "bars";

				"iatu", "conf", "io", "bars",

				"mhi";



		#address-cells = <3>;

		#size-cells = <2>;

qcom/sm8150-v2.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -50,7 +50,8 @@ 
		<0x60001000 0x1000>,

		<0x60100000 0x100000>,

		<0x60200000 0x100000>,

		<0x60300000 0x3d00000>;

		<0x60300000 0x3d00000>,

		<0x01c03000 0x1000>;



	qcom,pcie-phy-ver = <2110>;
@@ -160,7 +161,8 @@ 
		<0x40001000 0x1000>,

		<0x40100000 0x100000>,

		<0x40200000 0x100000>,

		<0x40300000 0x1fd00000>;

		<0x40300000 0x1fd00000>,

		<0x01c0b000 0x1000>;



	qcom,pcie-phy-ver = <2109>;