Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 06618075 authored by Leo Ruan's avatar Leo Ruan Committed by Greg Kroah-Hartman
Browse files

gpu: ipu-v3: Fix dev_dbg frequency output



[ Upstream commit 070a88fd4a03f921b73a2059e97d55faaa447dab ]

This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the fixed point math had a flaw and calculated error of 0.2%.

Before:
  Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
  IPU clock can give 27000000 with divider 10, error 0.2%
  Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU, 27000000Hz

After:
  Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
  IPU clock can give 27000000 with divider 10, error -0.8%
  Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU, 27000000Hz

Signed-off-by: default avatarLeo Ruan <tingquan.ruan@cn.bosch.com>
Signed-off-by: default avatarMark Jonas <mark.jonas@de.bosch.com>
Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20220207151411.5009-1-mark.jonas@de.bosch.com


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent b4ef44c7
Loading
Loading
Loading
Loading
+3 −2
Original line number Diff line number Diff line
@@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di *di,

		error = rate / (sig->mode.pixelclock / 1000);

		dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider %u, error %d.%u%%\n",
			rate, div, (signed)(error - 1000) / 10, error % 10);
		dev_dbg(di->ipu->dev, "  IPU clock can give %lu with divider %u, error %c%d.%d%%\n",
			rate, div, error < 1000 ? '-' : '+',
			abs(error - 1000) / 10, abs(error - 1000) % 10);

		/* Allow a 1% error */
		if (error < 1010 && error >= 990) {