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Commit 05dc698c authored by Lionel Landwerlin's avatar Lionel Landwerlin Committed by Matt Roper
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drm/i915: Do not read GAMMA_MODE register 



Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.

v2: Read GAMMA_MODE register value at init (Matt Roper's comment)

v3: Read GAMMA_MODE register in intel_modeset_readout_hw_state along
    with other registers (Matt Roper's comment).

v4: Mask GAMMA_MODE register with interesting bits when reading

Signed-off-by: default avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458125837-2576-3-git-send-email-lionel.g.landwerlin@intel.com
parent 8563b1e8

drivers/gpu/drm/i915/intel_color.c

+5 −2
Original line number Diff line number Diff line
@@ -121,6 +121,8 @@ static void haswell_load_luts(struct drm_crtc *crtc) 
	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct intel_crtc_state *intel_crtc_state =

		to_intel_crtc_state(crtc->state);

	bool reenable_ips = false;



	/*
@@ -128,11 +130,12 @@ static void haswell_load_luts(struct drm_crtc *crtc) 
	 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.

	 */

	if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&

	    ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==

	     GAMMA_MODE_MODE_SPLIT)) {

	    (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {

		hsw_disable_ips(intel_crtc);

		reenable_ips = true;

	}



	intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;

	I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);



	i9xx_load_luts(crtc);

drivers/gpu/drm/i915/intel_display.c

+3 −0
Original line number Diff line number Diff line
@@ -9961,6 +9961,9 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, 


	intel_get_pipe_src_size(crtc, pipe_config);



	pipe_config->gamma_mode =

		I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;



	if (INTEL_INFO(dev)->gen >= 9) {

		skl_init_scalers(dev, crtc, pipe_config);

	}

drivers/gpu/drm/i915/intel_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -578,6 +578,9 @@ struct intel_crtc_state { 
		 */

		bool need_postvbl_update;

	} wm;



	/* Gamma mode programmed on the pipe */

	uint32_t gamma_mode;

};



struct vlv_wm_state {