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Commit 04cc058f authored by Mika Westerberg's avatar Mika Westerberg Committed by Linus Walleij
Browse files

pinctrl: intel: Add support for 1k additional pull-down 



The next generation Intel GPIO hardware supports additional 1k pull-down
per-pad. Add support for this to the Intel core pinctrl driver.

Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent e57725ea

drivers/pinctrl/intel/pinctrl-intel.c

+17 −1
Original line number Original line Diff line number Diff line
@@ -458,12 +458,14 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin, 
{

{

	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);

	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);

	enum pin_config_param param = pinconf_to_config_param(*config);

	enum pin_config_param param = pinconf_to_config_param(*config);

	const struct intel_community *community;

	u32 value, term;

	u32 value, term;

	u32 arg = 0;

	u32 arg = 0;





	if (!intel_pad_owned_by_host(pctrl, pin))

	if (!intel_pad_owned_by_host(pctrl, pin))

		return -ENOTSUPP;

		return -ENOTSUPP;





	community = intel_get_community(pctrl, pin);

	value = readl(intel_get_padcfg(pctrl, pin, PADCFG1));

	value = readl(intel_get_padcfg(pctrl, pin, PADCFG1));

	term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;

	term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
@@ -499,6 +501,11 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin, 
			return -EINVAL;

			return -EINVAL;





		switch (term) {

		switch (term) {

		case PADCFG1_TERM_1K:

			if (!(community->features & PINCTRL_FEATURE_1K_PD))

				return -EINVAL;

			arg = 1000;

			break;

		case PADCFG1_TERM_5K:

		case PADCFG1_TERM_5K:

			arg = 5000;

			arg = 5000;

			break;

			break;
@@ -540,6 +547,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin, 
{

{

	unsigned param = pinconf_to_config_param(config);

	unsigned param = pinconf_to_config_param(config);

	unsigned arg = pinconf_to_config_argument(config);

	unsigned arg = pinconf_to_config_argument(config);

	const struct intel_community *community;

	void __iomem *padcfg1;

	void __iomem *padcfg1;

	unsigned long flags;

	unsigned long flags;

	int ret = 0;

	int ret = 0;
@@ -547,6 +555,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin, 




	raw_spin_lock_irqsave(&pctrl->lock, flags);

	raw_spin_lock_irqsave(&pctrl->lock, flags);





	community = intel_get_community(pctrl, pin);

	padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);

	padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);

	value = readl(padcfg1);

	value = readl(padcfg1);
@@ -589,6 +598,11 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin, 
		case 5000:

		case 5000:

			value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;

			value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;

			break;

			break;

		case 1000:

			if (!(community->features & PINCTRL_FEATURE_1K_PD))

				return -EINVAL;

			value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;

			break;

		default:

		default:

			ret = -EINVAL;

			ret = -EINVAL;

		}

		}
@@ -1115,8 +1129,10 @@ int intel_pinctrl_probe(struct platform_device *pdev, 
			u32 rev;

			u32 rev;





			rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT;

			rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT;

			if (rev >= 0x94)

			if (rev >= 0x94) {

				community->features |= PINCTRL_FEATURE_DEBOUNCE;

				community->features |= PINCTRL_FEATURE_DEBOUNCE;

				community->features |= PINCTRL_FEATURE_1K_PD;

			}

		}

		}





		/* Read offset of the pad configuration registers */

		/* Read offset of the pad configuration registers */

drivers/pinctrl/intel/pinctrl-intel.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -81,6 +81,7 @@ struct intel_community { 




/* Additional features supported by the hardware */

/* Additional features supported by the hardware */

#define PINCTRL_FEATURE_DEBOUNCE	BIT(0)

#define PINCTRL_FEATURE_DEBOUNCE	BIT(0)

#define PINCTRL_FEATURE_1K_PD		BIT(1)





#define PIN_GROUP(n, p, m)			\

#define PIN_GROUP(n, p, m)			\

	{					\

	{					\