Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0470466d authored by Stephen Rothwell's avatar Stephen Rothwell Committed by Paul Mackerras
Browse files

[POWERPC] Fix cputable.h for combined build 



Remove CPU_FTR_16M_PAGE from the cupfeatures mask at runtime on iSeries.

Signed-off-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 80814be4

arch/powerpc/mm/hash_utils_64.c

+1 −1
Original line number Diff line number Diff line
@@ -277,7 +277,7 @@ static void __init htab_init_page_sizes(void) 
	 * Not in the device-tree, let's fallback on known size

	 * list for 16M capable GP & GR

	 */

	if (cpu_has_feature(CPU_FTR_16M_PAGE) && !machine_is(iseries))

	if (cpu_has_feature(CPU_FTR_16M_PAGE))

		memcpy(mmu_psize_defs, mmu_psize_defaults_gp,

		       sizeof(mmu_psize_defaults_gp));

 found:

arch/powerpc/platforms/iseries/setup.c

+2 −0
Original line number Diff line number Diff line
@@ -643,6 +643,8 @@ static int __init iseries_probe(void) 
		return 0;



	hpte_init_iSeries();

	/* iSeries does not support 16M pages */

	cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE;



	return 1;

}

include/asm-powerpc/cputable.h

+3 −10
Original line number Diff line number Diff line
@@ -155,16 +155,9 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, 


#ifndef __ASSEMBLY__



#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \

#define CPU_FTR_PPCAS_ARCH_V2	(CPU_FTR_SLB | \

				 CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \

					CPU_FTR_NODSISRALIGN)



/* iSeries doesn't support large pages */

#ifdef CONFIG_PPC_ISERIES

#define CPU_FTR_PPCAS_ARCH_V2	(CPU_FTR_PPCAS_ARCH_V2_BASE)

#else

#define CPU_FTR_PPCAS_ARCH_V2	(CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE)

#endif /* CONFIG_PPC_ISERIES */

				 CPU_FTR_NODSISRALIGN | CPU_FTR_16M_PAGE)



/* We only set the altivec features if the kernel was compiled with altivec

 * support