Merge 8a251d8af120b79e98a7498e16ff4b77b7d38800 on remote branch (0462ea5b) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/cam_cdm/cam_cdm_core_common.c

+0 −5

Original line number	Diff line number	Diff line
		@@ -180,12 +180,10 @@ void cam_cdm_notify_clients(struct cam_hw_info *cdm_hw,
		(struct cam_cdm_bl_cb_request_entry *)data;

		client_idx = CAM_CDM_GET_CLIENT_IDX(node->client_hdl);
		mutex_lock(&cdm_hw->hw_mutex);
		client = core->clients[client_idx];
		if ((!client) \|\| (client->handle != node->client_hdl)) {
		CAM_ERR(CAM_CDM, "Invalid client %pK hdl=%x", client,
		node->client_hdl);
		mutex_unlock(&cdm_hw->hw_mutex);
		return;
		}
		cam_cdm_get_client_refcount(client);
		@@ -204,7 +202,6 @@ void cam_cdm_notify_clients(struct cam_hw_info *cdm_hw,
		}
		mutex_unlock(&client->lock);
		cam_cdm_put_client_refcount(client);
		mutex_unlock(&cdm_hw->hw_mutex);
		return;
		} else if (status == CAM_CDM_CB_STATUS_HW_RESET_DONE \|\|
		status == CAM_CDM_CB_STATUS_HW_FLUSH \|\|
		@@ -242,7 +239,6 @@ void cam_cdm_notify_clients(struct cam_hw_info *cdm_hw,

		for (i = 0; i < CAM_PER_CDM_MAX_REGISTERED_CLIENTS; i++) {
		if (core->clients[i] != NULL) {
		mutex_lock(&cdm_hw->hw_mutex);
		client = core->clients[i];
		cam_cdm_get_client_refcount(client);
		mutex_lock(&client->lock);
		@@ -265,7 +261,6 @@ void cam_cdm_notify_clients(struct cam_hw_info *cdm_hw,
		}
		mutex_unlock(&client->lock);
		cam_cdm_put_client_refcount(client);
		mutex_unlock(&cdm_hw->hw_mutex);
		}
		}
		}

drivers/cam_cdm/cam_cdm_hw_core.c

+6 −1

Original line number	Diff line number	Diff line
		@@ -1238,6 +1238,7 @@ static void cam_hw_cdm_work(struct work_struct *work)
		return;
		}

		mutex_lock(&cdm_hw->hw_mutex);
		mutex_lock(&core->bl_fifo[fifo_idx].fifo_lock);

		if (atomic_read(&core->bl_fifo[fifo_idx].work_record))
		@@ -1251,6 +1252,7 @@ static void cam_hw_cdm_work(struct work_struct *work)
		core->arbitration);
		mutex_unlock(&core->bl_fifo[fifo_idx]
		.fifo_lock);
		mutex_unlock(&cdm_hw->hw_mutex);
		return;
		}

		@@ -1289,6 +1291,7 @@ static void cam_hw_cdm_work(struct work_struct *work)
		}
		mutex_unlock(&core->bl_fifo[payload->fifo_idx]
		.fifo_lock);
		mutex_unlock(&cdm_hw->hw_mutex);
		}

		if (payload->irq_status &
		@@ -1405,9 +1408,9 @@ static void cam_hw_cdm_iommu_fault_handler(struct cam_smmu_pf_info *pf_info)
		cdm_hw->soc_info.index);
		for (i = 0; i < core->offsets->reg_data->num_bl_fifo; i++)
		mutex_unlock(&core->bl_fifo[i].fifo_lock);
		mutex_unlock(&cdm_hw->hw_mutex);
		cam_cdm_notify_clients(cdm_hw, CAM_CDM_CB_STATUS_PAGEFAULT,
		(void *)pf_info->iova);
		mutex_unlock(&cdm_hw->hw_mutex);
		clear_bit(CAM_CDM_ERROR_HW_STATUS, &core->cdm_status);
		} else {
		CAM_ERR(CAM_CDM, "Invalid token");
		@@ -1806,9 +1809,11 @@ int cam_hw_cdm_handle_error_info(

		if (node != NULL) {
		if (node->request_type == CAM_HW_CDM_BL_CB_CLIENT) {
		mutex_lock(&cdm_hw->hw_mutex);
		cam_cdm_notify_clients(cdm_hw,
		CAM_CDM_CB_STATUS_HW_ERROR,
		(void *)node);
		mutex_unlock(&cdm_hw->hw_mutex);
		} else if (node->request_type == CAM_HW_CDM_BL_CB_INTERNAL) {
		CAM_ERR(CAM_CDM, "Invalid node=%pK %d", node,
		node->request_type);

drivers/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c

+6 −8

Original line number	Diff line number	Diff line
		@@ -124,6 +124,12 @@ static int cam_isp_update_dual_config(
		cpu_addr += (cmd_desc->offset / 4);
		dual_config = (struct cam_isp_dual_config *)cpu_addr;

		if (dual_config->num_ports > size_isp_out) {
		CAM_ERR(CAM_ISP, "num_ports %d more than max_vfe_out_res %d",
		dual_config->num_ports, size_isp_out);
		return -EINVAL;
		}

		if ((dual_config->num_ports *
		sizeof(struct cam_isp_dual_stripe_config)) >
		(remain_len - offsetof(struct cam_isp_dual_config, stripes))) {
		@@ -132,14 +138,6 @@ static int cam_isp_update_dual_config(
		}
		for (i = 0; i < dual_config->num_ports; i++) {

		if (i >= CAM_ISP_IFE_OUT_RES_BASE + size_isp_out) {
		CAM_ERR(CAM_ISP,
		"failed update for i:%d > size_isp_out:%d",
		i, size_isp_out);
		rc = -EINVAL;
		goto end;
		}

		hw_mgr_res = &res_list_isp_out[i];
		if (!hw_mgr_res) {
		CAM_ERR(CAM_ISP,

drivers/cam_isp/isp_hw_mgr/isp_hw/ppi_hw/cam_csid_ppi_core.c

+7 −25

Original line number	Diff line number	Diff line
		@@ -163,9 +163,7 @@ static int cam_csid_ppi_init_hw(void hw_priv, void init_args,
		{
		int i, rc = 0;
		uint32_t num_lanes;
		uint32_t lanes[CAM_CSID_PPI_HW_MAX] = {0, 0, 0, 0};
		uint32_t cphy;
		bool dl0, dl1;
		uint32_t ppi_cfg_val = 0;
		struct cam_csid_ppi_hw *ppi_hw;
		struct cam_hw_info *ppi_hw_info;
		@@ -180,7 +178,6 @@ static int cam_csid_ppi_init_hw(void hw_priv, void init_args,
		goto end;
		}

		dl0 = dl1 = false;
		ppi_hw_info = (struct cam_hw_info *)hw_priv;
		ppi_hw = (struct cam_csid_ppi_hw *)ppi_hw_info->core_info;
		ppi_reg = ppi_hw->ppi_info->ppi_reg;
		@@ -195,31 +192,16 @@ static int cam_csid_ppi_init_hw(void hw_priv, void init_args,
		CAM_DBG(CAM_ISP, "lane_cfg 0x%x \| num_lanes 0x%x \| lane_type 0x%x",
		ppi_cfg.lane_cfg, num_lanes, cphy);

		for (i = 0; i < num_lanes; i++) {
		lanes[i] = ppi_cfg.lane_cfg & (0x3 << (4 * i));
		(lanes[i] < 2) ? (dl0 = true) : (dl1 = true);
		CAM_DBG(CAM_ISP, "lanes[%d] %d", i, lanes[i]);
		}

		if (num_lanes) {
		if (cphy) {
		for (i = 0; i < num_lanes; i++) {
		ppi_cfg_val \|= PPI_CFG_CPHY_DLX_SEL(lanes[i]);
		ppi_cfg_val \|= PPI_CFG_CPHY_DLX_EN(lanes[i]);
		}
		ppi_cfg_val \|= PPI_CFG_CPHY_DLX_SEL(0);
		ppi_cfg_val \|= PPI_CFG_CPHY_DLX_SEL(1);
		} else {
		if (dl0)
		ppi_cfg_val \|= PPI_CFG_CPHY_DLX_EN(0);
		if (dl1)
		ppi_cfg_val \|= PPI_CFG_CPHY_DLX_EN(1);
		}
		} else {
		CAM_ERR(CAM_ISP,
		"Number of lanes to enable is cannot be zero");
		rc = -1;
		goto end;
		ppi_cfg_val = 0;
		}

		for (i = 0; i < CAM_CSID_PPI_LANES_MAX; i++)
		ppi_cfg_val \|= PPI_CFG_CPHY_DLX_EN(i);

		CAM_DBG(CAM_ISP, "ppi_cfg_val 0x%x", ppi_cfg_val);
		soc_info = &ppi_hw->hw_info->soc_info;
		cam_io_w_mb(ppi_cfg_val, soc_info->reg_map[0].mem_base +

drivers/cam_isp/isp_hw_mgr/isp_hw/ppi_hw/cam_csid_ppi_core.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -25,7 +25,7 @@
		/*
		* Select the PHY (CPHY set '1' or DPHY set '0')
		*/
		#define PPI_CFG_CPHY_DLX_SEL(X) ((X < 2) ? BIT(X) : 0)
		#define PPI_CFG_CPHY_DLX_SEL(X) BIT(X)

		#define PPI_CFG_CPHY_DLX_EN(X) BIT(4+X)