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Commit 0445e7a5 authored by Will Deacon's avatar Will Deacon
Browse files

ARM: perf: add support for stalled cycle ABI events 



Commit 8f622422 ("perf events: Add generic front-end and back-end
stalled cycle event definitions") added two new ABI events for counting
stalled cycles.

This patch adds support for these new events to the ARM perf
implementation.

Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Jean Pihet <j-pihet@ti.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 4d301512

arch/arm/kernel/perf_event_v6.c

+18 −14
Original line number Diff line number Diff line
@@ -72,6 +72,8 @@ static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = { 
	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= ARMV6_PERFCTR_BR_EXEC,

	[PERF_COUNT_HW_BRANCH_MISSES]		= ARMV6_PERFCTR_BR_MISPREDICT,

	[PERF_COUNT_HW_BUS_CYCLES]		= HW_OP_UNSUPPORTED,

	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND]	= ARMV6_PERFCTR_IBUF_STALL,

	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND]	= ARMV6_PERFCTR_LSU_FULL_STALL,

};



static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -225,6 +227,8 @@ static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = { 
	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= ARMV6MPCORE_PERFCTR_BR_EXEC,

	[PERF_COUNT_HW_BRANCH_MISSES]		= ARMV6MPCORE_PERFCTR_BR_MISPREDICT,

	[PERF_COUNT_HW_BUS_CYCLES]		= HW_OP_UNSUPPORTED,

	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND]	= ARMV6MPCORE_PERFCTR_IBUF_STALL,

	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND]	= ARMV6MPCORE_PERFCTR_LSU_FULL_STALL,

};



static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]

arch/arm/kernel/perf_event_v7.c

+39 −28
Original line number Diff line number Diff line
@@ -77,11 +77,14 @@ enum armv7_a8_perf_types { 
	ARMV7_A8_PERFCTR_L2_CACHE_ACCESS		= 0x43,

	ARMV7_A8_PERFCTR_L2_CACHE_REFILL		= 0x44,

	ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS		= 0x50,

	ARMV7_A8_PERFCTR_STALL_ISIDE			= 0x56,

};



/* ARMv7 Cortex-A9 specific event types */

enum armv7_a9_perf_types {

	ARMV7_A9_PERFCTR_INSTR_CORE_RENAME		= 0x68,

	ARMV7_A9_PERFCTR_STALL_ICACHE			= 0x60,

	ARMV7_A9_PERFCTR_STALL_DISPATCH			= 0x66,

};



/* ARMv7 Cortex-A5 specific event types */
@@ -123,6 +126,8 @@ static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = { 
	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= ARMV7_PERFCTR_PC_WRITE,

	[PERF_COUNT_HW_BRANCH_MISSES]		= ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,

	[PERF_COUNT_HW_BUS_CYCLES]		= HW_OP_UNSUPPORTED,

	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND]	= ARMV7_A8_PERFCTR_STALL_ISIDE,

	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND]	= HW_OP_UNSUPPORTED,

};



static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -245,6 +250,8 @@ static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = { 
	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= ARMV7_PERFCTR_PC_WRITE,

	[PERF_COUNT_HW_BRANCH_MISSES]		= ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,

	[PERF_COUNT_HW_BUS_CYCLES]		= HW_OP_UNSUPPORTED,

	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND]	= ARMV7_A9_PERFCTR_STALL_ICACHE,

	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND]	= ARMV7_A9_PERFCTR_STALL_DISPATCH,

};



static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -367,6 +374,8 @@ static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = { 
	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= ARMV7_PERFCTR_PC_WRITE,

	[PERF_COUNT_HW_BRANCH_MISSES]		= ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,

	[PERF_COUNT_HW_BUS_CYCLES]		= HW_OP_UNSUPPORTED,

	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND]	= HW_OP_UNSUPPORTED,

	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND]	= HW_OP_UNSUPPORTED,

};



static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -473,6 +482,8 @@ static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = { 
	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= ARMV7_A15_PERFCTR_PC_WRITE_SPEC,

	[PERF_COUNT_HW_BRANCH_MISSES]		= ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,

	[PERF_COUNT_HW_BUS_CYCLES]		= ARMV7_PERFCTR_BUS_CYCLES,

	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND]	= HW_OP_UNSUPPORTED,

	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND]	= HW_OP_UNSUPPORTED,

};



static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]

arch/arm/kernel/perf_event_xscale.c

+9 −7
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = { 
	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= XSCALE_PERFCTR_BRANCH,

	[PERF_COUNT_HW_BRANCH_MISSES]		= XSCALE_PERFCTR_BRANCH_MISS,

	[PERF_COUNT_HW_BUS_CYCLES]		= HW_OP_UNSUPPORTED,

	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND]	= XSCALE_PERFCTR_ICACHE_NO_DELIVER,

	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND]	= HW_OP_UNSUPPORTED,

};



static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]