drm/nouveau/pm: some fermi chipsets still use volt 0x30 (03ce8d9e) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/gpu/drm/nouveau/nouveau_drv.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -420,6 +420,7 @@ struct nouveau_pm_voltage_level {

		struct nouveau_pm_voltage {
		bool supported;
		u8 version;
		u8 vid_mask;

		struct nouveau_pm_voltage_level *level;

+4 −4

Original line number	Diff line number	Diff line
		@@ -146,16 +146,16 @@ nouveau_perf_voltage(struct drm_device dev, struct bit_entry P,
		id = perflvl->volt_min;
		perflvl->volt_min = 0;

		/* pre-fermi vbios stores the voltage level directly in the
		* perflvl entry as a multiple of 10mV
		/* boards using voltage table version <0x40 store the voltage
		* level directly in the perflvl entry as a multiple of 10mV
		*/
		if (dev_priv->card_type < NV_C0) {
		if (dev_priv->engine.pm.voltage.version < 0x40) {
		perflvl->volt_min = id * 10000;
		perflvl->volt_max = perflvl->volt_min;
		return;
		}

		/* from fermi onwards, the perflvl stores an index into yet another
		/* on newer ones, the perflvl stores an index into yet another
		* vbios table containing a min/max voltage value for the perflvl
		*/
		if (P->version != 2 \|\| P->length < 34) {

+2 −1

Original line number	Diff line number	Diff line
		@@ -204,7 +204,8 @@ nouveau_volt_init(struct drm_device *dev)
		}

		/* parse vbios entries into common format */
		if (volt[0] < 0x40) {
		voltage->version = volt[0];
		if (voltage->version < 0x40) {
		voltage->nr_level = entries;
		voltage->level =
		kcalloc(entries, sizeof(*voltage->level), GFP_KERNEL);