Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 038761df authored by Alexander Stein's avatar Alexander Stein Committed by Brian Norris
Browse files

mtd: fsl-quadspi: Actually clear TX FIFO upon write



QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO.

Signed-off-by: default avatarAlexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent cef1ed9c
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -539,7 +539,7 @@ static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,

	/* clear the TX FIFO. */
	tmp = readl(q->iobase + QUADSPI_MCR);
	writel(tmp | QUADSPI_MCR_CLR_RXF_MASK, q->iobase + QUADSPI_MCR);
	writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR);

	/* fill the TX data to the FIFO */
	for (j = 0, i = ((count + 3) / 4); j < i; j++) {