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Commit 02376531 authored by Vivekanand Tryambake's avatar Vivekanand Tryambake
Browse files

ARM: dts: msm: add dt nodes for adsp & cdsp PIL for Lahaina 

Add devicetree node for adsp & cdsp PIL for lahaina to enable
loading of adsp & cdsp firmware and bringing out of reset.

Change-Id: I1091a40500adcdfc5f2825405ef5c2095547a0f8
parent cd858369

qcom/lahaina.dtsi

+91 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <dt-bindings/interconnect/qcom,lahaina.h>

#include <dt-bindings/soc/qcom,ipcc.h>

#include <dt-bindings/soc/qcom,rpmh-rsc.h>

#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>



/ {

	model = "Qualcomm Technologies, Inc. Lahaina";
@@ -1472,6 +1473,96 @@ 
		};

	};



	qcom,lpass@17300000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x17300000 0x00100>;



		vdd_cx-supply = <&VDD_LPI_CX_LEVEL>;

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		vdd_mx-supply = <&VDD_LPI_MX_LEVEL>;

		qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		qcom,proxy-reg-names = "vdd_cx","vdd_mx";



		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";



		qcom,pas-id = <1>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <423>;

		qcom,sysmon-id = <1>;

		qcom,ssctl-instance-id = <0x14>;

		qcom,firmware-name = "adsp";

		memory-region = <&pil_adsp_mem>;

		qcom,signal-aop;

		qcom,complete-ramdump;



		/* Inputs from lpass */

		interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,

				<&adsp_smp2p_in 0 0>,

				<&adsp_smp2p_in 2 0>,

				<&adsp_smp2p_in 1 0>,

				<&adsp_smp2p_in 3 0>;



		interrupt-names = "qcom,wdog",

				"qcom,err-fatal",

				"qcom,proxy-unvote",

				"qcom,err-ready",

				"qcom,stop-ack";



		/* Outputs to lpass */

		qcom,smem-states = <&adsp_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";



		mboxes = <&qmp_aop 0>;

		mbox-names = "adsp-pil";

	};



	qcom,turing@0x98900000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x98900000 0x1400000>;



		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		vdd_mx-supply = <&VDD_MXC_LEVEL>;

		qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		qcom,proxy-reg-names = "vdd_cx","vdd_mx";



		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";



		qcom,pas-id = <18>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <601>;

		qcom,sysmon-id = <7>;

		qcom,ssctl-instance-id = <0x17>;

		qcom,firmware-name = "cdsp";

		memory-region = <&pil_cdsp_mem>;

		qcom,complete-ramdump;



		interconnects = <&nsp_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>;



		/* Inputs from turing */

		interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,

				<&cdsp_smp2p_in 0 0>,

				<&cdsp_smp2p_in 2 0>,

				<&cdsp_smp2p_in 1 0>,

				<&cdsp_smp2p_in 3 0>;



		interrupt-names = "qcom,wdog",

				"qcom,err-fatal",

				"qcom,proxy-unvote",

				"qcom,err-ready",

				"qcom,stop-ack";



		/* Outputs to turing */

		qcom,smem-states = <&cdsp_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";



	};





	qcom,venus@aab0000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0xaab0000 0x2000>;