Commit 01e5d183 authored May 07, 2019 by Linus Torvalds

Merge tag 'mmc-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Fix a few memoryleaks
   - Minor improvements to the card initialization sequence
   - Partially support sleepy GPIO controllers for pwrseq eMMC

  MMC host:
   - alcor: Work with multiple-entry sglists
   - alcor: Enable DMA for writes
   - meson-gx: Improve tuning support
   - meson-gx: Avoid clock glitch when switching to DDR modes
   - meson-gx: Disable unreliable HS400 mode
   - mmci: Minor updates for support of HW busy detection
   - mmci: Support data transfers for the stm32_sdmmc variant
   - mmci: Restructure code to better support different variants
   - mtk-sd: Add support for version found on MT7620 family SOCs
   - mtk-sd: Add support for the MT8516 version
   - mtk-sd: Add Chaotian Jing as the maintainer
   - sdhci: Reorganize request-code to convert from tasklet to workqueue
   - sdhci_am654: Stabilize support for lower speed modes
   - sdhci-esdhc-imx: Add HS400 support for iMX7ULP
   - sdhci-esdhc-imx: Add support for iMX7ULP version
   - sdhci-of-arasan: Allow to disable DCMDs via DT for CQE
   - sdhci-of-esdhc: Add support for the ls1028a version
   - sdhci-of-esdhc: Several fixups for errata
   - sdhci-pci: Fix BYT OCP setting
   - sdhci-pci: Add support for Intel CML
   - sdhci-tegra: Add support for system suspend/resume
   - sdhci-tegra: Add CQE support for Tegra186 WAR
   - sdhci-tegra: Add support for Tegra194
   - sdhci-tegra: Update HW tuning process

  MEMSTICK:
   - I volunteered to help as a maintainer for the memstick subsystem,
     which is reflected by an update to the MAINTAINERS file. Changes
     are funneled through my MMC git and we will use the linux-mmc
     mailing list.

  MEMSTICK host:
   - A few minor cleanups"

* tag 'mmc-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (87 commits)
  mmc: sdhci-pci: Fix BYT OCP setting
  dt-bindings: mmc: add DT bindings for ls1028a eSDHC host controller
  mmc: alcor: Drop pointer to mmc_host from alcor_sdmmc_host
  mmc: mtk-sd: select REGULATOR
  mmc: mtk-sd: enable internal card-detect logic.
  mmc: mtk-sd: add support for config found in mt7620 family SOCs.
  mmc: mtk-sd: don't hard-code interrupt trigger type
  mmc: core: Fix tag set memory leak
  dt-bindings: mmc: Add support for MT8516 to mtk-sd
  mmc: mmci: Prevent polling for busy detection in IRQ context
  mmc: mmci: Cleanup mmci_cmd_irq() for busy detect
  mmc: usdhi6rol0: mark expected switch fall-throughs
  mmc: core: Verify SD bus width
  mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP
  mmc: sdhci-esdhc-imx: add pm_qos to interact with cpuidle
  dt-bindings: mmc: fsl-imx-esdhc: add imx7ulp compatible string
  mmc: meson-gx: add signal resampling tuning
  mmc: meson-gx: remove Rx phase tuning
  mmc: meson-gx: avoid clock glitch when switching to DDR modes
  mmc: meson-gx: disable HS400
  ...

parents b4b52b88 0a49a619

Documentation/devicetree/bindings/mmc/fsl-esdhc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -17,6 +17,7 @@ Required properties:
		"fsl,t4240-esdhc"
		Possible compatibles for ARM:
		"fsl,ls1012a-esdhc"
		"fsl,ls1028a-esdhc"
		"fsl,ls1088a-esdhc"
		"fsl,ls1043a-esdhc"
		"fsl,ls1046a-esdhc"

Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -17,6 +17,7 @@ Required properties:
		"fsl,imx6sx-usdhc"
		"fsl,imx6ull-usdhc"
		"fsl,imx7d-usdhc"
		"fsl,imx7ulp-usdhc"
		"fsl,imx8qxp-usdhc"

		Optional properties:

Documentation/devicetree/bindings/mmc/mmc.txt

+2 −0

Original line number	Diff line number	Diff line
		@@ -64,6 +64,8 @@ Optional properties:
		whether pwrseq-simple is used. Default to 10ms if no available.
		- supports-cqe : The presence of this property indicates that the corresponding
		MMC host controller supports HW command queue feature.
		- disable-cqe-dcmd: This property indicates that the MMC controller's command
		queue engine (CQE) does not support direct commands (DCMDs).

		NOTE on CD and WP polarity. To use common for all SD/MMC host controllers line
		polarity properties, we have to fix the meaning of the "normal" and "inverted"

Documentation/devicetree/bindings/mmc/mtk-sd.txt

+2 −0

Original line number	Diff line number	Diff line
		@@ -11,10 +11,12 @@ Required properties:
		"mediatek,mt8135-mmc": for mmc host ip compatible with mt8135
		"mediatek,mt8173-mmc": for mmc host ip compatible with mt8173
		"mediatek,mt8183-mmc": for mmc host ip compatible with mt8183
		"mediatek,mt8516-mmc": for mmc host ip compatible with mt8516
		"mediatek,mt2701-mmc": for mmc host ip compatible with mt2701
		"mediatek,mt2712-mmc": for mmc host ip compatible with mt2712
		"mediatek,mt7622-mmc": for MT7622 SoC
		"mediatek,mt7623-mmc", "mediatek,mt2701-mmc": for MT7623 SoC
		"mediatek,mt7620-mmc", for MT7621 SoC (and others)

		- reg: physical base address of the controller and length
		- interrupts: Should contain MSDC interrupt number

Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -14,6 +14,7 @@ Required properties:
		- "nvidia,tegra124-sdhci": for Tegra124 and Tegra132
		- "nvidia,tegra210-sdhci": for Tegra210
		- "nvidia,tegra186-sdhci": for Tegra186
		- "nvidia,tegra194-sdhci": for Tegra194
		- clocks : Must contain one entry, for the module clock.
		See ../clocks/clock-bindings.txt for details.
		- resets : Must contain an entry for each entry in reset-names.