Merge "audio-kernel: Disable clock voting logs" (01b8138d) · Commits · e / devices / android_kernel_fairphone_FP5

asoc/codecs/audio-ext-clk-up.c

+4 −8

Original line number	Diff line number	Diff line
		@@ -76,8 +76,6 @@ static int audio_ext_clk_prepare(struct clk_hw *hw)
		if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
		(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX)) {
		clk_priv->clk_cfg.enable = 1;
		trace_printk("%s: vote for %d clock\n",
		__func__, clk_priv->clk_src);
		ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
		if (ret < 0) {
		if (__ratelimit(&rtl))
		@@ -122,8 +120,6 @@ static void audio_ext_clk_unprepare(struct clk_hw *hw)
		if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
		(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX)) {
		clk_priv->clk_cfg.enable = 0;
		trace_printk("%s: unvote for %d clock\n",
		__func__, clk_priv->clk_src);
		ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
		if (ret < 0) {
		if (__ratelimit(&rtl))
		@@ -161,7 +157,7 @@ static int lpass_hw_vote_prepare(struct clk_hw *hw)
		static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);

		if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_CORE_HW_VOTE) {
		trace_printk("%s: vote for %d clock\n",
		pr_debug("%s: vote for %d clock\n",
		__func__, clk_priv->clk_src);
		ret = afe_vote_lpass_core_hw(AFE_LPASS_CORE_HW_MACRO_BLOCK,
		"LPASS_HW_MACRO",
		@@ -174,7 +170,7 @@ static int lpass_hw_vote_prepare(struct clk_hw *hw)
		}

		if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_AUDIO_HW_VOTE) {
		trace_printk("%s: vote for %d clock\n",
		pr_debug("%s: vote for %d clock\n",
		__func__, clk_priv->clk_src);
		ret = afe_vote_lpass_core_hw(AFE_LPASS_CORE_HW_DCODEC_BLOCK,
		"LPASS_HW_DCODEC",
		@@ -196,7 +192,7 @@ static void lpass_hw_vote_unprepare(struct clk_hw *hw)
		int ret = 0;

		if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_CORE_HW_VOTE) {
		trace_printk("%s: unvote for %d clock\n",
		pr_debug("%s: unvote for %d clock\n",
		__func__, clk_priv->clk_src);
		ret = afe_unvote_lpass_core_hw(
		AFE_LPASS_CORE_HW_MACRO_BLOCK,
		@@ -208,7 +204,7 @@ static void lpass_hw_vote_unprepare(struct clk_hw *hw)
		}

		if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_AUDIO_HW_VOTE) {
		trace_printk("%s: unvote for %d clock\n",
		pr_debug("%s: unvote for %d clock\n",
		__func__, clk_priv->clk_src);
		ret = afe_unvote_lpass_core_hw(
		AFE_LPASS_CORE_HW_DCODEC_BLOCK,

asoc/codecs/bolero/bolero-cdc.c

+3 −10

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
		* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
		*/

		#include <linux/of_platform.h>
		@@ -891,7 +892,7 @@ static int bolero_ssr_enable(struct device dev, void data)
		priv->component,
		BOLERO_MACRO_EVT_CLK_RESET, 0x0);
		}
		trace_printk("%s: clk count reset\n", __func__);
		pr_debug("%s: clk count reset\n", __func__);

		if (priv->rsc_clk_cb)
		priv->rsc_clk_cb(priv->clk_dev, BOLERO_MACRO_EVT_SSR_GFMUX_UP);
		@@ -914,7 +915,6 @@ static int bolero_ssr_enable(struct device dev, void data)
		/* Add a 100usec sleep to ensure last register write is done */
		usleep_range(100,110);
		bolero_clk_rsc_enable_all_clocks(priv->clk_dev, false);
		trace_printk("%s: regcache_sync done\n", __func__);
		/* call ssr event for supported macros */
		for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
		if (!priv->macro_params[macro_idx].event_handler)
		@@ -923,7 +923,6 @@ static int bolero_ssr_enable(struct device dev, void data)
		priv->component,
		BOLERO_MACRO_EVT_SSR_UP, 0x0);
		}
		trace_printk("%s: SSR up events processed by all macros\n", __func__);
		bolero_cdc_notifier_call(priv, BOLERO_SLV_EVT_SSR_UP);
		return 0;
		}
		@@ -1469,8 +1468,6 @@ int bolero_runtime_resume(struct device *dev)
		}
		}
		priv->core_hw_vote_count++;
		trace_printk("%s: hw vote count %d\n",
		__func__, priv->core_hw_vote_count);

		audio_vote:
		if (priv->lpass_audio_hw_vote == NULL) {
		@@ -1488,8 +1485,6 @@ int bolero_runtime_resume(struct device *dev)
		}
		}
		priv->core_audio_vote_count++;
		trace_printk("%s: audio vote count %d\n",
		__func__, priv->core_audio_vote_count);

		done:
		mutex_unlock(&priv->vote_lock);
		@@ -1513,7 +1508,7 @@ int bolero_runtime_suspend(struct device *dev)
		dev_dbg(dev, "%s: Invalid lpass core hw node\n",
		__func__);
		}
		trace_printk("%s: hw vote count %d\n",
		pr_debug("%s: hw vote count %d\n",
		__func__, priv->core_hw_vote_count);

		if (priv->lpass_audio_hw_vote != NULL) {
		@@ -1526,8 +1521,6 @@ int bolero_runtime_suspend(struct device *dev)
		dev_dbg(dev, "%s: Invalid lpass audio hw node\n",
		__func__);
		}
		trace_printk("%s: audio vote count %d\n",
		__func__, priv->core_audio_vote_count);

		mutex_unlock(&priv->vote_lock);
		return 0;

asoc/codecs/bolero/bolero-clk-rsc.c

+1 −9

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
		* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
		*/

		#include <linux/of_platform.h>
		@@ -136,7 +137,6 @@ int bolero_rsc_clk_reset(struct device *dev, int clk_id)
		dev_dbg(priv->dev,
		"%s: clock reset after ssr, count %d\n", __func__, count);

		trace_printk("%s: clock reset after ssr, count %d\n", __func__, count);
		while (count--) {
		clk_prepare_enable(priv->clk[clk_id]);
		clk_prepare_enable(priv->clk[clk_id + NPL_CLK_OFFSET]);
		@@ -297,8 +297,6 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
		if (priv->dev_up_gfmux) {
		iowrite32(0x1, clk_muxsel);
		muxsel = ioread32(clk_muxsel);
		trace_printk("%s: muxsel value after enable: %d\n",
		__func__, muxsel);
		}
		bolero_clk_rsc_mux0_clk_request(priv,
		default_clk_id,
		@@ -330,8 +328,6 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
		if (priv->dev_up_gfmux) {
		iowrite32(0x0, clk_muxsel);
		muxsel = ioread32(clk_muxsel);
		trace_printk("%s: muxsel value after disable: %d\n",
		__func__, muxsel);
		}
		}
		}
		@@ -555,7 +551,6 @@ int bolero_clk_rsc_request_clock(struct device *dev,
		if (!priv->dev_up && enable) {
		dev_err_ratelimited(priv->dev, "%s: SSR is in progress..\n",
		__func__);
		trace_printk("%s: SSR is in progress..\n", __func__);
		ret = -EINVAL;
		goto err;
		}
		@@ -585,9 +580,6 @@ int bolero_clk_rsc_request_clock(struct device *dev,
		dev_dbg(priv->dev, "%s: clk_cnt: %d for requested clk: %d, enable: %d\n",
		__func__, priv->clk_cnt[clk_id_req], clk_id_req,
		enable);
		trace_printk("%s: clk_cnt: %d for requested clk: %d, enable: %d\n",
		__func__, priv->clk_cnt[clk_id_req], clk_id_req,
		enable);

		mutex_unlock(&priv->rsc_clk_lock);

asoc/codecs/bolero/rx-macro.c

+2 −7

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
		* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
		*/

		#include <linux/module.h>
		@@ -1396,7 +1397,7 @@ static int rx_macro_mclk_enable(struct rx_macro_priv *rx_priv,
		}
		}
		exit:
		trace_printk("%s: mclk_enable = %u, dapm = %d clk_users= %d\n",
		dev_dbg(rx_priv->dev, "%s: mclk_enable = %u, dapm = %d clk_users= %d\n",
		__func__, mclk_enable, dapm, rx_priv->rx_mclk_users);
		mutex_unlock(&rx_priv->mclk_lock);
		return ret;
		@@ -1483,7 +1484,6 @@ static int rx_macro_event_handler(struct snd_soc_component *component,
		rx_macro_wcd_clsh_imped_config(component, data, false);
		break;
		case BOLERO_MACRO_EVT_SSR_DOWN:
		trace_printk("%s, enter SSR down\n", __func__);
		rx_priv->dev_up = false;
		if (rx_priv->swr_ctrl_data) {
		swrm_wcd_notify(
		@@ -1518,7 +1518,6 @@ static int rx_macro_event_handler(struct snd_soc_component *component,
		rx_macro_core_vote(rx_priv, false);
		break;
		case BOLERO_MACRO_EVT_SSR_UP:
		trace_printk("%s, enter SSR up\n", __func__);
		rx_priv->dev_up = true;
		/* reset swr after ssr/pdr */
		rx_priv->reset_swr = true;
		@@ -3827,8 +3826,6 @@ static int rx_swrm_clock(void *handle, bool enable)

		mutex_lock(&rx_priv->swr_clk_lock);

		trace_printk("%s: swrm clock %s\n",
		__func__, (enable ? "enable" : "disable"));
		dev_dbg(rx_priv->dev, "%s: swrm clock %s\n",
		__func__, (enable ? "enable" : "disable"));
		if (enable) {
		@@ -3895,8 +3892,6 @@ static int rx_swrm_clock(void *handle, bool enable)
		}
		}
		}
		trace_printk("%s: swrm clock users %d\n",
		__func__, rx_priv->swr_clk_users);
		dev_dbg(rx_priv->dev, "%s: swrm clock users %d\n",
		__func__, rx_priv->swr_clk_users);
		exit:

asoc/codecs/bolero/tx-macro.c

+1 −18

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
		* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
		*/

		#include <linux/module.h>
		@@ -419,7 +420,6 @@ static int tx_macro_event_handler(struct snd_soc_component *component,

		switch (event) {
		case BOLERO_MACRO_EVT_SSR_DOWN:
		trace_printk("%s, enter SSR down\n", __func__);
		if (tx_priv->swr_ctrl_data) {
		swrm_wcd_notify(
		tx_priv->swr_ctrl_data[0].tx_swr_pdev,
		@@ -436,7 +436,6 @@ static int tx_macro_event_handler(struct snd_soc_component *component,
		}
		break;
		case BOLERO_MACRO_EVT_SSR_UP:
		trace_printk("%s, enter SSR up\n", __func__);
		/* reset swr after ssr/pdr */
		tx_priv->reset_swr = true;
		if (tx_priv->swr_ctrl_data)
		@@ -2632,9 +2631,6 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv,
		{
		int ret = 0, clk_tx_ret = 0;

		trace_printk("%s: clock type %s, enable: %s tx_mclk_users: %d\n",
		__func__, (clk_type ? "VA_MCLK" : "TX_MCLK"),
		(enable ? "enable" : "disable"), tx_priv->tx_mclk_users);
		dev_dbg(tx_priv->dev,
		"%s: clock type %s, enable: %s tx_mclk_users: %d\n",
		__func__, (clk_type ? "VA_MCLK" : "TX_MCLK"),
		@@ -2642,7 +2638,6 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv,

		if (enable) {
		if (tx_priv->swr_clk_users == 0) {
		trace_printk("%s: tx swr clk users 0\n", __func__);
		ret = msm_cdc_pinctrl_select_active_state(
		tx_priv->tx_swr_gpio_p);
		if (ret < 0) {
		@@ -2660,7 +2655,6 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv,
		TX_CORE_CLK,
		true);
		if (clk_type == TX_MCLK) {
		trace_printk("%s: requesting TX_MCLK\n", __func__);
		ret = tx_macro_mclk_enable(tx_priv, 1);
		if (ret < 0) {
		if (tx_priv->swr_clk_users == 0)
		@@ -2673,7 +2667,6 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv,
		}
		}
		if (clk_type == VA_MCLK) {
		trace_printk("%s: requesting VA_MCLK\n", __func__);
		ret = bolero_clk_rsc_request_clock(tx_priv->dev,
		TX_CORE_CLK,
		VA_CORE_CLK,
		@@ -2707,8 +2700,6 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv,
		if (tx_priv->swr_clk_users == 0) {
		dev_dbg(tx_priv->dev, "%s: reset_swr: %d\n",
		__func__, tx_priv->reset_swr);
		trace_printk("%s: reset_swr: %d\n",
		__func__, tx_priv->reset_swr);
		if (tx_priv->reset_swr)
		regmap_update_bits(regmap,
		BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
		@@ -2806,7 +2797,6 @@ static int tx_macro_tx_va_mclk_enable(struct tx_macro_priv *tx_priv,
		TX_CORE_CLK,
		false);
		exit:
		trace_printk("%s: exit\n", __func__);
		return ret;
		}

		@@ -2920,10 +2910,6 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
		}

		mutex_lock(&tx_priv->swr_clk_lock);
		trace_printk("%s: swrm clock %s tx_swr_clk_cnt: %d va_swr_clk_cnt: %d\n",
		__func__,
		(enable ? "enable" : "disable"),
		tx_priv->tx_swr_clk_cnt, tx_priv->va_swr_clk_cnt);
		dev_dbg(tx_priv->dev,
		"%s: swrm clock %s tx_swr_clk_cnt: %d va_swr_clk_cnt: %d\n",
		__func__, (enable ? "enable" : "disable"),
		@@ -2986,9 +2972,6 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
		}
		}

		trace_printk("%s: swrm clock users %d tx_clk_sts_cnt: %d va_clk_sts_cnt: %d\n",
		__func__, tx_priv->swr_clk_users, tx_priv->tx_clk_status,
		tx_priv->va_clk_status);
		dev_dbg(tx_priv->dev,
		"%s: swrm clock users %d tx_clk_sts_cnt: %d va_clk_sts_cnt: %d\n",
		__func__, tx_priv->swr_clk_users, tx_priv->tx_clk_status,