Commit 01b3fb1e authored May 23, 2019 by Halil Pasic Committed by Heiko Carstens Jun 15, 2019

virtio/s390: use cacheline aligned airq bit vectors



The flag AIRQ_IV_CACHELINE was recently added to airq_iv_create(). Let
us use it! We actually wanted the vector to span a cacheline all along.

Signed-off-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Michael Mueller <mimu@linux.ibm.com>
Tested-by: Michael Mueller <mimu@linux.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>

parent b50623e5

drivers/s390/virtio/virtio_ccw.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -216,7 +216,8 @@ static struct airq_info *new_airq_info(void)
		if (!info)
		return NULL;
		rwlock_init(&info->lock);
		info->aiv = airq_iv_create(VIRTIO_IV_BITS, AIRQ_IV_ALLOC \| AIRQ_IV_PTR);
		info->aiv = airq_iv_create(VIRTIO_IV_BITS, AIRQ_IV_ALLOC \| AIRQ_IV_PTR
		\| AIRQ_IV_CACHELINE);
		if (!info->aiv) {
		kfree(info);
		return NULL;