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Commit ff82577a authored by Monk Liu's avatar Monk Liu Committed by Alex Deucher
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drm/amdgpu:kiq reg access need timeout(v2)



this is to prevent fence forever waiting if FLR occured
during register accessing.

v2:
use define instead of hardcode for the timeout msec

Signed-off-by: default avatarMonk Liu <Monk.Liu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2fdde9fa
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+8 −5
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@
 */

#include "amdgpu.h"
#define MAX_KIQ_REG_WAIT	100000

int amdgpu_allocate_static_csa(struct amdgpu_device *adev)
{
@@ -128,10 +129,12 @@ uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg)
	amdgpu_ring_commit(ring);
	mutex_unlock(&kiq->ring_mutex);

	r = dma_fence_wait(f, false);
	if (r)
		DRM_ERROR("wait for kiq fence error: %ld.\n", r);
	r = dma_fence_wait_timeout(f, false, msecs_to_jiffies(MAX_KIQ_REG_WAIT));
	dma_fence_put(f);
	if (r < 1) {
		DRM_ERROR("wait for kiq fence error: %ld.\n", r);
		return ~0;
	}

	val = adev->wb.wb[adev->virt.reg_val_offs];

@@ -154,8 +157,8 @@ void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
	amdgpu_ring_commit(ring);
	mutex_unlock(&kiq->ring_mutex);

	r = dma_fence_wait(f, false);
	if (r)
	r = dma_fence_wait_timeout(f, false, msecs_to_jiffies(MAX_KIQ_REG_WAIT));
	if (r < 1)
		DRM_ERROR("wait for kiq fence error: %ld.\n", r);
	dma_fence_put(f);
}