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Commit ff649f9d authored by Sudheer Papothi's avatar Sudheer Papothi
Browse files

ASoC: bolero: Enable clock Fs generation in bolero codec 



Clock Fs generation registers are in always on domain but
is needed for all the playback and capture usecases. Enable
clock Fs generation in the boloero codec after the clock
enablement.

Change-Id: I3a9cf14660f871b26ec96ef8b3e245ba5dadeb78
Signed-off-by: default avatarSudheer Papothi <spapothi@codeaurora.org>
parent d59c94eb

asoc/codecs/bolero/bolero-cdc.c

+42 −0
Original line number Diff line number Diff line
@@ -464,6 +464,46 @@ void bolero_unregister_macro(struct device *dev, u16 macro_id) 
}

EXPORT_SYMBOL(bolero_unregister_macro);



static void bolero_fs_gen_enable(struct bolero_priv *priv, bool enable)

{

	if (enable) {

		if (++priv->clk_users == 1) {

			mutex_unlock(&priv->clk_lock);

			regmap_update_bits(priv->regmap,

				BOLERO_CDC_VA_CLK_RST_CTRL_MCLK_CONTROL,

				0x01, 0x01);

			regmap_update_bits(priv->regmap,

				BOLERO_CDC_VA_CLK_RST_CTRL_FS_CNT_CONTROL,

				0x01, 0x01);

			regmap_update_bits(priv->regmap,

				BOLERO_CDC_VA_TOP_CSR_TOP_CFG0,

				0x02, 0x02);

			mutex_lock(&priv->clk_lock);

		}

	} else {

		if (priv->clk_users <= 0) {

			dev_err(priv->dev,

				"%s:clock already disabled\n",

				__func__);

			priv->clk_users = 0;

			return;

		}

		if (--priv->clk_users == 0) {

			mutex_unlock(&priv->clk_lock);

			regmap_update_bits(priv->regmap,

				BOLERO_CDC_VA_TOP_CSR_TOP_CFG0,

				0x02, 0x00);

			regmap_update_bits(priv->regmap,

				BOLERO_CDC_VA_CLK_RST_CTRL_FS_CNT_CONTROL,

				0x01, 0x00);

			regmap_update_bits(priv->regmap,

				BOLERO_CDC_VA_CLK_RST_CTRL_MCLK_CONTROL,

				0x01, 0x00);

			mutex_lock(&priv->clk_lock);

		}

	}

}



/**

 * bolero_request_clock - request for clock enable/disable

 *
@@ -510,6 +550,7 @@ int bolero_request_clock(struct device *dev, u16 macro_id, 
				macro_id, mclk_mux0_macro);

			goto err;

		}

		bolero_fs_gen_enable(priv, enable);

		break;

	case MCLK_MUX1:

		mclk_mux1_macro =  bolero_mclk_mux_tbl[macro_id][MCLK_MUX1];
@@ -527,6 +568,7 @@ int bolero_request_clock(struct device *dev, u16 macro_id, 
			if (enable)

				goto err;

		}

		bolero_fs_gen_enable(priv, enable);

		/*

		 * need different return value as ret variable

		 * is used to track mclk_mux0 enable success or fail

asoc/codecs/bolero/internal.h

+1 −0
Original line number Diff line number Diff line
@@ -73,6 +73,7 @@ struct bolero_priv { 
	struct wcd_ctrl_platform_data plat_data;

	struct device *wcd_dev;

	struct blocking_notifier_head notifier;

	int clk_users;

};



struct regmap *bolero_regmap_init(struct device *dev,

asoc/codecs/bolero/va-macro.c

+0 −18
Original line number Diff line number Diff line
@@ -166,15 +166,6 @@ static int va_macro_mclk_enable(struct va_macro_priv *va_priv, 
			regcache_sync_region(regmap,

					VA_START_OFFSET,

					VA_MAX_OFFSET);

			regmap_update_bits(regmap,

				BOLERO_CDC_VA_CLK_RST_CTRL_MCLK_CONTROL,

				0x01, 0x01);

			regmap_update_bits(regmap,

				BOLERO_CDC_VA_CLK_RST_CTRL_FS_CNT_CONTROL,

				0x01, 0x01);

			regmap_update_bits(regmap,

				BOLERO_CDC_VA_TOP_CSR_TOP_CFG0,

				0x02, 0x02);

		}

		va_priv->va_mclk_users++;

	} else {
@@ -186,15 +177,6 @@ static int va_macro_mclk_enable(struct va_macro_priv *va_priv, 
		}

		va_priv->va_mclk_users--;

		if (va_priv->va_mclk_users == 0) {

			regmap_update_bits(regmap,

				BOLERO_CDC_VA_TOP_CSR_TOP_CFG0,

				0x02, 0x00);

			regmap_update_bits(regmap,

				BOLERO_CDC_VA_CLK_RST_CTRL_FS_CNT_CONTROL,

				0x01, 0x00);

			regmap_update_bits(regmap,

				BOLERO_CDC_VA_CLK_RST_CTRL_MCLK_CONTROL,

				0x01, 0x00);

			bolero_request_clock(va_priv->dev,

					VA_MACRO,

					va_priv->mclk_mux_sel, false);