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Commit ff2ed96d authored by Robin Murphy's avatar Robin Murphy Committed by Will Deacon
Browse files

iommu/ipmmu-vmsa: Clean up DMA API usage 



With the correct DMA API calls now integrated into the io-pgtable code,
let that handle the flushing of non-coherent page table updates.

Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent bdc6d973

drivers/iommu/ipmmu-vmsa.c

+5 −14
Original line number Diff line number Diff line
@@ -283,24 +283,10 @@ static void ipmmu_tlb_add_flush(unsigned long iova, size_t size, bool leaf, 
	/* The hardware doesn't support selective TLB flush. */

}



static void ipmmu_flush_pgtable(void *ptr, size_t size, void *cookie)

{

	unsigned long offset = (unsigned long)ptr & ~PAGE_MASK;

	struct ipmmu_vmsa_domain *domain = cookie;



	/*

	 * TODO: Add support for coherent walk through CCI with DVM and remove

	 * cache handling.

	 */

	dma_map_page(domain->mmu->dev, virt_to_page(ptr), offset, size,

		     DMA_TO_DEVICE);

}



static struct iommu_gather_ops ipmmu_gather_ops = {

	.tlb_flush_all = ipmmu_tlb_flush_all,

	.tlb_add_flush = ipmmu_tlb_add_flush,

	.tlb_sync = ipmmu_tlb_flush_all,

	.flush_pgtable = ipmmu_flush_pgtable,

};



/* -----------------------------------------------------------------------------
@@ -327,6 +313,11 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) 
	domain->cfg.ias = 32;

	domain->cfg.oas = 40;

	domain->cfg.tlb = &ipmmu_gather_ops;

	/*

	 * TODO: Add support for coherent walk through CCI with DVM and remove

	 * cache handling. For now, delegate it to the io-pgtable code.

	 */

	domain->cfg.iommu_dev = domain->mmu->dev;



	domain->iop = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &domain->cfg,

					   domain);