Loading include/asm-mips/processor.h +53 −37 Original line number Original line Diff line number Diff line Loading @@ -82,10 +82,6 @@ struct mips_fpu_struct { unsigned int fcr31; unsigned int fcr31; }; }; #define INIT_FPU { \ {0,} \ } #define NUM_DSP_REGS 6 #define NUM_DSP_REGS 6 typedef __u32 dspreg_t; typedef __u32 dspreg_t; Loading @@ -95,8 +91,6 @@ struct mips_dsp_state { unsigned int dspcontrol; unsigned int dspcontrol; }; }; #define INIT_DSP {{0,},} #define INIT_CPUMASK { \ #define INIT_CPUMASK { \ {0,} \ {0,} \ } } Loading Loading @@ -155,41 +149,63 @@ struct thread_struct { #define MF_N64 0 #define MF_N64 0 #ifdef CONFIG_MIPS_MT_FPAFF #ifdef CONFIG_MIPS_MT_FPAFF #define FPAFF_INIT 0, INIT_CPUMASK, #define FPAFF_INIT \ .emulated_fp = 0, \ .user_cpus_allowed = INIT_CPUMASK, #else #else #define FPAFF_INIT #define FPAFF_INIT #endif /* CONFIG_MIPS_MT_FPAFF */ #endif /* CONFIG_MIPS_MT_FPAFF */ #define INIT_THREAD { \ #define INIT_THREAD { \ /* \ /* \ * saved main processor registers \ * Saved main processor registers \ */ \ */ \ 0, 0, 0, 0, 0, 0, 0, 0, \ .reg16 = 0, \ 0, 0, 0, \ .reg17 = 0, \ .reg18 = 0, \ .reg19 = 0, \ .reg20 = 0, \ .reg21 = 0, \ .reg22 = 0, \ .reg23 = 0, \ .reg29 = 0, \ .reg30 = 0, \ .reg31 = 0, \ /* \ /* \ * saved cp0 stuff \ * Saved cp0 stuff \ */ \ */ \ 0, \ .cp0_status = 0, \ /* \ /* \ * saved fpu/fpu emulator stuff \ * Saved FPU/FPU emulator stuff \ */ \ */ \ INIT_FPU, \ .fpu = { \ .fpr = {0,}, \ .fcr31 = 0, \ }, \ /* \ /* \ * fpu affinity state (null if not FPAFF) \ * FPU affinity state (null if not FPAFF) \ */ \ */ \ FPAFF_INIT \ FPAFF_INIT \ /* \ /* \ * saved dsp/dsp emulator stuff \ * Saved DSP stuff \ */ \ */ \ INIT_DSP, \ .dsp = { \ .dspr = {0, }, \ .dspcontrol = 0, \ }, \ /* \ /* \ * Other stuff associated with the process \ * Other stuff associated with the process \ */ \ */ \ 0, 0, 0, 0, \ .cp0_badvaddr = 0, \ .cp0_baduaddr = 0, \ .error_code = 0, \ .trap_no = 0, \ /* \ /* \ * For now the default is to fix address errors \ * For now the default is to fix address errors \ */ \ */ \ MF_FIXADE, 0, 0 \ .mflags = MF_FIXADE, \ .irix_trampoline = 0, \ .irix_oldctx = 0, \ } } struct task_struct; struct task_struct; Loading Loading
include/asm-mips/processor.h +53 −37 Original line number Original line Diff line number Diff line Loading @@ -82,10 +82,6 @@ struct mips_fpu_struct { unsigned int fcr31; unsigned int fcr31; }; }; #define INIT_FPU { \ {0,} \ } #define NUM_DSP_REGS 6 #define NUM_DSP_REGS 6 typedef __u32 dspreg_t; typedef __u32 dspreg_t; Loading @@ -95,8 +91,6 @@ struct mips_dsp_state { unsigned int dspcontrol; unsigned int dspcontrol; }; }; #define INIT_DSP {{0,},} #define INIT_CPUMASK { \ #define INIT_CPUMASK { \ {0,} \ {0,} \ } } Loading Loading @@ -155,41 +149,63 @@ struct thread_struct { #define MF_N64 0 #define MF_N64 0 #ifdef CONFIG_MIPS_MT_FPAFF #ifdef CONFIG_MIPS_MT_FPAFF #define FPAFF_INIT 0, INIT_CPUMASK, #define FPAFF_INIT \ .emulated_fp = 0, \ .user_cpus_allowed = INIT_CPUMASK, #else #else #define FPAFF_INIT #define FPAFF_INIT #endif /* CONFIG_MIPS_MT_FPAFF */ #endif /* CONFIG_MIPS_MT_FPAFF */ #define INIT_THREAD { \ #define INIT_THREAD { \ /* \ /* \ * saved main processor registers \ * Saved main processor registers \ */ \ */ \ 0, 0, 0, 0, 0, 0, 0, 0, \ .reg16 = 0, \ 0, 0, 0, \ .reg17 = 0, \ .reg18 = 0, \ .reg19 = 0, \ .reg20 = 0, \ .reg21 = 0, \ .reg22 = 0, \ .reg23 = 0, \ .reg29 = 0, \ .reg30 = 0, \ .reg31 = 0, \ /* \ /* \ * saved cp0 stuff \ * Saved cp0 stuff \ */ \ */ \ 0, \ .cp0_status = 0, \ /* \ /* \ * saved fpu/fpu emulator stuff \ * Saved FPU/FPU emulator stuff \ */ \ */ \ INIT_FPU, \ .fpu = { \ .fpr = {0,}, \ .fcr31 = 0, \ }, \ /* \ /* \ * fpu affinity state (null if not FPAFF) \ * FPU affinity state (null if not FPAFF) \ */ \ */ \ FPAFF_INIT \ FPAFF_INIT \ /* \ /* \ * saved dsp/dsp emulator stuff \ * Saved DSP stuff \ */ \ */ \ INIT_DSP, \ .dsp = { \ .dspr = {0, }, \ .dspcontrol = 0, \ }, \ /* \ /* \ * Other stuff associated with the process \ * Other stuff associated with the process \ */ \ */ \ 0, 0, 0, 0, \ .cp0_badvaddr = 0, \ .cp0_baduaddr = 0, \ .error_code = 0, \ .trap_no = 0, \ /* \ /* \ * For now the default is to fix address errors \ * For now the default is to fix address errors \ */ \ */ \ MF_FIXADE, 0, 0 \ .mflags = MF_FIXADE, \ .irix_trampoline = 0, \ .irix_oldctx = 0, \ } } struct task_struct; struct task_struct; Loading