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Commit fe9ba3ec authored by Benjamin Tissoires's avatar Benjamin Tissoires Committed by Wolfram Sang
Browse files

i2c: i801: use BIT() macro for bits definition 



i801 mixes hexadecimal and decimal values for defining bits. However,
we have a nice BIT() macro for this exact purpose.

No functional changes, cleanup only.

Reviewed-by: default avatarJean Delvare <jdelvare@suse.de>
Signed-off-by: default avatarBenjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent 9786b1f1

drivers/i2c/busses/i2c-i801.c

+26 −26
Original line number Original line Diff line number Diff line
@@ -137,27 +137,27 @@ 
#define SBREG_SMBCTRL		0xc6000c

#define SBREG_SMBCTRL		0xc6000c





/* Host status bits for SMBPCISTS */

/* Host status bits for SMBPCISTS */

#define SMBPCISTS_INTS		0x08

#define SMBPCISTS_INTS		BIT(3)





/* Control bits for SMBPCICTL */

/* Control bits for SMBPCICTL */

#define SMBPCICTL_INTDIS	0x0400

#define SMBPCICTL_INTDIS	BIT(10)





/* Host configuration bits for SMBHSTCFG */

/* Host configuration bits for SMBHSTCFG */

#define SMBHSTCFG_HST_EN	1

#define SMBHSTCFG_HST_EN	BIT(0)

#define SMBHSTCFG_SMB_SMI_EN	2

#define SMBHSTCFG_SMB_SMI_EN	BIT(1)

#define SMBHSTCFG_I2C_EN	4

#define SMBHSTCFG_I2C_EN	BIT(2)

#define SMBHSTCFG_SPD_WD	0x10

#define SMBHSTCFG_SPD_WD	BIT(4)





/* TCO configuration bits for TCOCTL */

/* TCO configuration bits for TCOCTL */

#define TCOCTL_EN		0x0100

#define TCOCTL_EN		BIT(8)





/* Auxiliary status register bits, ICH4+ only */

/* Auxiliary status register bits, ICH4+ only */

#define SMBAUXSTS_CRCE		1

#define SMBAUXSTS_CRCE		BIT(0)

#define SMBAUXSTS_STCO		2

#define SMBAUXSTS_STCO		BIT(1)





/* Auxiliary control register bits, ICH4+ only */

/* Auxiliary control register bits, ICH4+ only */

#define SMBAUXCTL_CRC		1

#define SMBAUXCTL_CRC		BIT(0)

#define SMBAUXCTL_E32B		2

#define SMBAUXCTL_E32B		BIT(1)





/* Other settings */

/* Other settings */

#define MAX_RETRIES		400

#define MAX_RETRIES		400
@@ -172,27 +172,27 @@ 
#define I801_I2C_BLOCK_DATA	0x18	/* ICH5 and later */

#define I801_I2C_BLOCK_DATA	0x18	/* ICH5 and later */





/* I801 Host Control register bits */

/* I801 Host Control register bits */

#define SMBHSTCNT_INTREN	0x01

#define SMBHSTCNT_INTREN	BIT(0)

#define SMBHSTCNT_KILL		0x02

#define SMBHSTCNT_KILL		BIT(1)

#define SMBHSTCNT_LAST_BYTE	0x20

#define SMBHSTCNT_LAST_BYTE	BIT(5)

#define SMBHSTCNT_START		0x40

#define SMBHSTCNT_START		BIT(6)

#define SMBHSTCNT_PEC_EN	0x80	/* ICH3 and later */

#define SMBHSTCNT_PEC_EN	BIT(7)	/* ICH3 and later */





/* I801 Hosts Status register bits */

/* I801 Hosts Status register bits */

#define SMBHSTSTS_BYTE_DONE	0x80

#define SMBHSTSTS_BYTE_DONE	BIT(7)

#define SMBHSTSTS_INUSE_STS	0x40

#define SMBHSTSTS_INUSE_STS	BIT(6)

#define SMBHSTSTS_SMBALERT_STS	0x20

#define SMBHSTSTS_SMBALERT_STS	BIT(5)

#define SMBHSTSTS_FAILED	0x10

#define SMBHSTSTS_FAILED	BIT(4)

#define SMBHSTSTS_BUS_ERR	0x08

#define SMBHSTSTS_BUS_ERR	BIT(3)

#define SMBHSTSTS_DEV_ERR	0x04

#define SMBHSTSTS_DEV_ERR	BIT(2)

#define SMBHSTSTS_INTR		0x02

#define SMBHSTSTS_INTR		BIT(1)

#define SMBHSTSTS_HOST_BUSY	0x01

#define SMBHSTSTS_HOST_BUSY	BIT(0)





/* Host Notify Status register bits */

/* Host Notify Status register bits */

#define SMBSLVSTS_HST_NTFY_STS	1

#define SMBSLVSTS_HST_NTFY_STS	BIT(0)





/* Host Notify Command register bits */

/* Host Notify Command register bits */

#define SMBSLVCMD_HST_NTFY_INTREN	0x01

#define SMBSLVCMD_HST_NTFY_INTREN	BIT(0)





#define STATUS_ERROR_FLAGS	(SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \

#define STATUS_ERROR_FLAGS	(SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \

				 SMBHSTSTS_DEV_ERR)

				 SMBHSTSTS_DEV_ERR)