Commit fe686bab authored Mar 15, 2017 by Philipp Tomsich Committed by Maxime Ripard Mar 20, 2017

clk: sunxi-ng: Fix div/mult settings for osc12M on A64



The mult/div for osc12M was previously backwards (giving a 48M rate
for osc12M). Fix it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

parent 9ad0bb39

drivers/clk/sunxi-ng/ccu-sun50i-a64.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -566,7 +566,7 @@ static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu",
		0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);

		/* Fixed Factor clocks */
		static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 1, 2, 0);
		static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 2, 1, 0);

		/* We hardcode the divider to 4 for now */
		static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio",