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Commit fe036a06 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Michael Ellerman
Browse files

powerpc/64/kexec: Fix MMU cleanup on radix 



Just using the hash ops won't work anymore since radix will have
NULL in there. Instead create an mmu_cleanup_all() function which
will do the right thing based on the MMU mode.

For Radix, for now I clear UPRT and the PTCR, effectively switching
back to Radix with no partition table setup.

Currently set it to NULL on BookE thought it might be a good idea
to wipe the TLB there (Scott ?)

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: default avatarBalbir Singh <bsingharora@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent fc48bad5

arch/powerpc/include/asm/mmu-book3e.h

+3 −0
Original line number Diff line number Diff line
@@ -313,6 +313,9 @@ extern int book3e_htw_mode; 
 * return 1, indicating that the tlb requires preloading.

 */

#define HUGETLB_NEED_PRELOAD



#define mmu_cleanup_all NULL



#endif



#endif /* !__ASSEMBLY__ */

arch/powerpc/include/asm/mmu.h

+4 −0
Original line number Diff line number Diff line
@@ -204,6 +204,10 @@ extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup; 
 * make it match the size our of bolted TLB area

 */

extern u64 ppc64_rma_size;



/* Cleanup function used by kexec */

extern void mmu_cleanup_all(void);

extern void radix__mmu_cleanup_all(void);

#endif /* CONFIG_PPC64 */



struct mm_struct;

arch/powerpc/kernel/machine_kexec_64.c

+2 −10
Original line number Diff line number Diff line
@@ -55,9 +55,6 @@ int default_machine_kexec_prepare(struct kimage *image) 
	const unsigned long *basep;

	const unsigned int *sizep;



	if (!mmu_hash_ops.hpte_clear_all)

		return -ENOENT;



	/*

	 * Since we use the kernel fault handlers and paging code to

	 * handle the virtual mode, we must make sure no destination
@@ -380,12 +377,7 @@ void default_machine_kexec(struct kimage *image) 
	 */

	kexec_sequence(&kexec_stack, image->start, image,

		       page_address(image->control_code_page),

#ifdef CONFIG_PPC_STD_MMU

			mmu_hash_ops.hpte_clear_all

#else

			NULL

#endif

	);

		       mmu_cleanup_all);

	/* NOTREACHED */

}

arch/powerpc/mm/pgtable-book3s64.c

+9 −0
Original line number Diff line number Diff line
@@ -116,3 +116,12 @@ void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr, 
	return;

}

#endif /* CONFIG_TRANSPARENT_HUGEPAGE */



/* For use by kexec */

void mmu_cleanup_all(void)

{

	if (radix_enabled())

		radix__mmu_cleanup_all();

	else if (mmu_hash_ops.hpte_clear_all)

		mmu_hash_ops.hpte_clear_all();

}

arch/powerpc/mm/pgtable-radix.c

+12 −0
Original line number Diff line number Diff line
@@ -396,6 +396,18 @@ void radix__early_init_mmu_secondary(void) 
	}

}



void radix__mmu_cleanup_all(void)

{

	unsigned long lpcr;



	if (!firmware_has_feature(FW_FEATURE_LPAR)) {

		lpcr = mfspr(SPRN_LPCR);

		mtspr(SPRN_LPCR, lpcr & ~LPCR_UPRT);

		mtspr(SPRN_PTCR, 0);

		radix__flush_tlb_all();

	}

}



void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base,

				phys_addr_t first_memblock_size)

{