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Commit fd03420b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2015-09-24' of git://anongit.freedesktop.org/drm-intel into drm-fixes 

a few drm/i915 fixes, including a fix to the recent regression
reported by Sedat Dilek

* tag 'drm-intel-fixes-2015-09-24' of git://anongit.freedesktop.org/drm-intel:
  drm/i915/bios: handle MIPI Sequence Block v3+ gracefully
  drm/i915: Add primary plane to mask if it's visible
  drm/i915: workaround bad DSL readout v3
  drm/i915: fix kernel-doc warnings in intel_audio.c
parents 0a3579e3 cd67d226

drivers/gpu/drm/i915/i915_irq.c

+26 −0
Original line number Diff line number Diff line
@@ -639,6 +639,32 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc) 
	else

		position = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) & DSL_LINEMASK_GEN3;



	/*

	 * On HSW, the DSL reg (0x70000) appears to return 0 if we

	 * read it just before the start of vblank.  So try it again

	 * so we don't accidentally end up spanning a vblank frame

	 * increment, causing the pipe_update_end() code to squak at us.

	 *

	 * The nature of this problem means we can't simply check the ISR

	 * bit and return the vblank start value; nor can we use the scanline

	 * debug register in the transcoder as it appears to have the same

	 * problem.  We may need to extend this to include other platforms,

	 * but so far testing only shows the problem on HSW.

	 */

	if (IS_HASWELL(dev) && !position) {

		int i, temp;



		for (i = 0; i < 100; i++) {

			udelay(1);

			temp = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) &

				DSL_LINEMASK_GEN3;

			if (temp != position) {

				position = temp;

				break;

			}

		}

	}



	/*

	 * See update_scanline_offset() for the details on the

	 * scanline_offset adjustment.

drivers/gpu/drm/i915/intel_audio.c

+1 −1
Original line number Diff line number Diff line
@@ -430,7 +430,7 @@ void intel_audio_codec_enable(struct intel_encoder *intel_encoder) 


/**

 * intel_audio_codec_disable - Disable the audio codec for HD audio

 * @encoder: encoder on which to disable audio

 * @intel_encoder: encoder on which to disable audio

 *

 * The disable sequences must be performed before disabling the transcoder or

 * port.

drivers/gpu/drm/i915/intel_bios.c

+11 −1
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ find_section(const void *_bdb, int section_id) 
	const struct bdb_header *bdb = _bdb;

	const u8 *base = _bdb;

	int index = 0;

	u16 total, current_size;

	u32 total, current_size;

	u8 current_id;



	/* skip to first section */
@@ -57,6 +57,10 @@ find_section(const void *_bdb, int section_id) 
		current_size = *((const u16 *)(base + index));

		index += 2;



		/* The MIPI Sequence Block v3+ has a separate size field. */

		if (current_id == BDB_MIPI_SEQUENCE && *(base + index) >= 3)

			current_size = *((const u32 *)(base + index + 1));



		if (index + current_size > total)

			return NULL;
@@ -799,6 +803,12 @@ parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 
		return;

	}



	/* Fail gracefully for forward incompatible sequence block. */

	if (sequence->version >= 3) {

		DRM_ERROR("Unable to parse MIPI Sequence Block v3+\n");

		return;

	}



	DRM_DEBUG_DRIVER("Found MIPI sequence block\n");



	block_size = get_blocksize(sequence);

drivers/gpu/drm/i915/intel_display.c

+5 −2
Original line number Diff line number Diff line
@@ -15087,9 +15087,12 @@ static void readout_plane_state(struct intel_crtc *crtc, 


		plane_state = to_intel_plane_state(p->base.state);



		if (p->base.type == DRM_PLANE_TYPE_PRIMARY)

		if (p->base.type == DRM_PLANE_TYPE_PRIMARY) {

			plane_state->visible = primary_get_hw_state(crtc);

		else {

			if (plane_state->visible)

				crtc->base.state->plane_mask |=

					1 << drm_plane_index(&p->base);

		} else {

			if (active)

				p->disable_plane(&p->base, &crtc->base);