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Commit fc3b9bb3 authored Jul 19, 2018 by Sunil Paidimarri

data-kernel: EMAC: Fix clk rates and bus BW votes in suspend



Vote for zero bus BW for AXI/AHB clocks
Set clock rate to zero for RGMII TX clock.

CRs-Fixed: 2280671
Change-Id: I86c496bc4d681dbc7d921466b6b63dd513d9196e
Acked-by: Rahul Kawadgave <rahulak@qti.qualcomm.com>
Signed-off-by: Sunil Paidimarri <hisunil@codeaurora.org>

parent 29f15b87

drivers/emac-dwc-eqos/DWC_ETH_QOS_mdio.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -668,6 +668,10 @@ void DWC_ETH_QOS_set_clk_and_bus_config(struct DWC_ETH_QOS_prv_data *pdata, int
		case SPEED_10:
		pdata->vote_idx = VOTE_IDX_10MBPS;
		break;
		case 0:
		pdata->vote_idx = VOTE_IDX_0MBPS;
		pdata->rgmii_clk_rate = 0;
		break;
		}

		if (pdata->bus_hdl) {

drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -713,6 +713,8 @@ void DWC_ETH_QOS_suspend_clks(struct DWC_ETH_QOS_prv_data *pdata)
		reinit_completion(&pdata->clk_enable_done);
		pdata->clks_suspended = 1;

		DWC_ETH_QOS_set_clk_and_bus_config(pdata, 0);

		if (dwc_eth_qos_res_data.axi_clk)
		clk_disable_unprepare(dwc_eth_qos_res_data.axi_clk);

		@@ -1619,6 +1621,8 @@ int DWC_ETH_QOS_remove(struct platform_device *pdev)

		emac_emb_smmu_exit();

		DWC_ETH_QOS_set_clk_and_bus_config(pdata, 0);

		free_netdev(dev);

		platform_set_drvdata(pdev, NULL);