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Commit fafdbdf7 authored by Neil Armstrong's avatar Neil Armstrong Committed by Kevin Hilman
Browse files

ARM64: dts: meson-gx: Add Graphic Controller nodes



Add Video Processing Unit and CVBS Output nodes, and enable CVBS on selected
boards.

Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent 1cf3df8a
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+16 −0
Original line number Diff line number Diff line
@@ -356,5 +356,21 @@
				status = "disabled";
			};
		};

		vpu: vpu@d0100000 {
			compatible = "amlogic,meson-gx-vpu";
			reg = <0x0 0xd0100000 0x0 0x100000>,
			      <0x0 0xc883c000 0x0 0x1000>,
			      <0x0 0xc8838000 0x0 0x1000>;
			reg-names = "vpu", "hhi", "dmc";
			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;

			/* CVBS VDAC output port */
			cvbs_vdac_port: port@0 {
				reg = <0>;
			};
		};
	};
};
+16 −0
Original line number Diff line number Diff line
@@ -142,6 +142,16 @@
		clocks = <&wifi32k>;
		clock-names = "ext_clock";
	};

	cvbs-connector {
		compatible = "composite-video-connector";

		port {
			cvbs_connector_in: endpoint {
				remote-endpoint = <&cvbs_vdac_out>;
			};
		};
	};
};

&uart_AO {
@@ -229,3 +239,9 @@
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
};

&cvbs_vdac_port {
	cvbs_vdac_out: endpoint {
		remote-endpoint = <&cvbs_connector_in>;
	};
};
+16 −0
Original line number Diff line number Diff line
@@ -125,6 +125,16 @@
		clocks = <&wifi32k>;
		clock-names = "ext_clock";
	};

	cvbs-connector {
		compatible = "composite-video-connector";

		port {
			cvbs_connector_in: endpoint {
				remote-endpoint = <&cvbs_vdac_out>;
			};
		};
	};
};

/* This UART is brought out to the DB9 connector */
@@ -234,3 +244,9 @@
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
};

&cvbs_vdac_port {
	cvbs_vdac_out: endpoint {
		remote-endpoint = <&cvbs_connector_in>;
	};
};
+4 −0
Original line number Diff line number Diff line
@@ -506,3 +506,7 @@
		 <&clkc CLKID_FCLK_DIV2>;
	clock-names = "core", "clkin0", "clkin1";
};

&vpu {
	compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
};
+16 −0
Original line number Diff line number Diff line
@@ -117,6 +117,16 @@
		clocks = <&wifi32k>;
		clock-names = "ext_clock";
	};

	cvbs-connector {
		compatible = "composite-video-connector";

		port {
			cvbs_connector_in: endpoint {
				remote-endpoint = <&cvbs_vdac_out>;
			};
		};
	};
};

&uart_AO {
@@ -203,3 +213,9 @@
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
};

&cvbs_vdac_port {
	cvbs_vdac_out: endpoint {
		remote-endpoint = <&cvbs_connector_in>;
	};
};
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