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Commit fabed5ad authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'sunxi-fixes-for-4.13-3' of... 

Merge tag 'sunxi-fixes-for-4.13-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes

Allwinner fixes for 4.13, take 3

This is a revert of the EMAC bindings. The discussion has not settled down
yet on a proper representation of the PHY, and therefore we cannot commit
to a binding yet

* tag 'sunxi-fixes-for-4.13-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux

:
  arm: dts: sunxi: Revert EMAC changes
  arm64: dts: allwinner: Revert EMAC changes
  dt-bindings: net: Revert sun8i dwmac binding

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 93a4c835 fe45174b

Documentation/devicetree/bindings/net/dwmac-sun8i.txt

deleted100644 → 0
+0 −84
Original line number Diff line number Diff line 
* Allwinner sun8i GMAC ethernet controller



This device is a platform glue layer for stmmac.

Please see stmmac.txt for the other unchanged properties.



Required properties:

- compatible: should be one of the following string:

		"allwinner,sun8i-a83t-emac"

		"allwinner,sun8i-h3-emac"

		"allwinner,sun8i-v3s-emac"

		"allwinner,sun50i-a64-emac"

- reg: address and length of the register for the device.

- interrupts: interrupt for the device

- interrupt-names: should be "macirq"

- clocks: A phandle to the reference clock for this device

- clock-names: should be "stmmaceth"

- resets: A phandle to the reset control for this device

- reset-names: should be "stmmaceth"

- phy-mode: See ethernet.txt

- phy-handle: See ethernet.txt

- #address-cells: shall be 1

- #size-cells: shall be 0

- syscon: A phandle to the syscon of the SoC with one of the following

 compatible string:

  - allwinner,sun8i-h3-system-controller

  - allwinner,sun8i-v3s-system-controller

  - allwinner,sun50i-a64-system-controller

  - allwinner,sun8i-a83t-system-controller



Optional properties:

- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)

- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)

Both delay properties need to be a multiple of 100. They control the delay for

external PHY.



Optional properties for the following compatibles:

  - "allwinner,sun8i-h3-emac",

  - "allwinner,sun8i-v3s-emac":

- allwinner,leds-active-low: EPHY LEDs are active low



Required child node of emac:

- mdio bus node: should be named mdio



Required properties of the mdio node:

- #address-cells: shall be 1

- #size-cells: shall be 0



The device node referenced by "phy" or "phy-handle" should be a child node

of the mdio node. See phy.txt for the generic PHY bindings.



Required properties of the phy node with the following compatibles:

  - "allwinner,sun8i-h3-emac",

  - "allwinner,sun8i-v3s-emac":

- clocks: a phandle to the reference clock for the EPHY

- resets: a phandle to the reset control for the EPHY



Example:



emac: ethernet@1c0b000 {

	compatible = "allwinner,sun8i-h3-emac";

	syscon = <&syscon>;

	reg = <0x01c0b000 0x104>;

	interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;

	interrupt-names = "macirq";

	resets = <&ccu RST_BUS_EMAC>;

	reset-names = "stmmaceth";

	clocks = <&ccu CLK_BUS_EMAC>;

	clock-names = "stmmaceth";

	#address-cells = <1>;

	#size-cells = <0>;



	phy-handle = <&int_mii_phy>;

	phy-mode = "mii";

	allwinner,leds-active-low;

	mdio: mdio {

		#address-cells = <1>;

		#size-cells = <0>;

		int_mii_phy: ethernet-phy@1 {

			reg = <1>;

			clocks = <&ccu CLK_BUS_EPHY>;

			resets = <&ccu RST_BUS_EPHY>;

		};

	};

};

arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts

+0 −9
Original line number Diff line number Diff line
@@ -56,8 +56,6 @@ 


	aliases {

		serial0 = &uart0;

		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */

		ethernet0 = &emac;

		ethernet1 = &xr819;

	};
@@ -104,13 +102,6 @@ 
	status = "okay";

};



&emac {

	phy-handle = <&int_mii_phy>;

	phy-mode = "mii";

	allwinner,leds-active-low;

	status = "okay";

};



&mmc0 {

	pinctrl-names = "default";

	pinctrl-0 = <&mmc0_pins_a>;

arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts

+0 −19
Original line number Diff line number Diff line
@@ -52,7 +52,6 @@ 
	compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";



	aliases {

		ethernet0 = &emac;

		serial0 = &uart0;

		serial1 = &uart1;

	};
@@ -115,30 +114,12 @@ 
	status = "okay";

};



&emac {

	pinctrl-names = "default";

	pinctrl-0 = <&emac_rgmii_pins>;

	phy-supply = <&reg_gmac_3v3>;

	phy-handle = <&ext_rgmii_phy>;

	phy-mode = "rgmii";



	allwinner,leds-active-low;

	status = "okay";

};



&ir {

	pinctrl-names = "default";

	pinctrl-0 = <&ir_pins_a>;

	status = "okay";

};



&mdio {

	ext_rgmii_phy: ethernet-phy@1 {

		compatible = "ethernet-phy-ieee802.3-c22";

		reg = <0>;

	};

};



&mmc0 {

	pinctrl-names = "default";

	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;

arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts

+0 −7
Original line number Diff line number Diff line
@@ -46,10 +46,3 @@ 
	model = "FriendlyARM NanoPi NEO";

	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";

};
 


&emac {

	phy-handle = <&int_mii_phy>;

	phy-mode = "mii";

	allwinner,leds-active-low;

	status = "okay";

};

arch/arm/boot/dts/sun8i-h3-orangepi-2.dts

+0 −8
Original line number Diff line number Diff line
@@ -54,7 +54,6 @@ 
	aliases {

		serial0 = &uart0;

		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */

		ethernet0 = &emac;

		ethernet1 = &rtl8189;

	};
@@ -118,13 +117,6 @@ 
	status = "okay";

};



&emac {

	phy-handle = <&int_mii_phy>;

	phy-mode = "mii";

	allwinner,leds-active-low;

	status = "okay";

};



&ir {

	pinctrl-names = "default";

	pinctrl-0 = <&ir_pins_a>;