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Commit fa2af6e4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile 

Pull tile updates from Chris Metcalf:
 "These changes cover a range of new arch/tile features and
  optimizations.  They've been through LKML review and on linux-next for
  a month or so.  There's also one bug-fix that just missed 3.4, which
  I've marked for stable."

Fixed up trivial conflict in arch/tile/Kconfig (new added tile Kconfig
entries clashing with the generic timer/clockevents changes).

* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
  tile: default to tilegx_defconfig for ARCH=tile
  tile: fix bug where fls(0) was not returning 0
  arch/tile: mark TILEGX as not EXPERIMENTAL
  tile/mm/fault.c: Port OOM changes to handle_page_fault
  arch/tile: add descriptive text if the kernel reports a bad trap
  arch/tile: allow querying cpu module information from the hypervisor
  arch/tile: fix hardwall for tilegx and generalize for idn and ipi
  arch/tile: support multiple huge page sizes dynamically
  mm: add new arch_make_huge_pte() method for tile support
  arch/tile: support kexec() for tilegx
  arch/tile: support <asm/cachectl.h> header for cacheflush() syscall
  arch/tile: Allow tilegx to build with either 16K or 64K page size
  arch/tile: optimize get_user/put_user and friends
  arch/tile: support building big-endian kernel
  arch/tile: allow building Linux with transparent huge pages enabled
  arch/tile: use interrupt critical sections less
parents 109b9b04 1fcb78e9

arch/tile/Kconfig

+37 −6
Original line number Diff line number Diff line
@@ -48,6 +48,14 @@ config NEED_PER_CPU_PAGE_FIRST_CHUNK 
config SYS_SUPPORTS_HUGETLBFS

	def_bool y



# Support for additional huge page sizes besides HPAGE_SIZE.

# The software support is currently only present in the TILE-Gx

# hypervisor. TILEPro in any case does not support page sizes

# larger than the default HPAGE_SIZE.

config HUGETLB_SUPER_PAGES

	depends on HUGETLB_PAGE && TILEGX

	def_bool y



# FIXME: tilegx can implement a more efficient rwsem.

config RWSEM_GENERIC_SPINLOCK

	def_bool y
@@ -107,16 +115,14 @@ config HVC_TILE 
	select HVC_DRIVER

	def_bool y



# Please note: TILE-Gx support is not yet finalized; this is

# the preliminary support.  TILE-Gx drivers are only provided

# with the alpha or beta test versions for Tilera customers.

config TILEGX

	depends on EXPERIMENTAL

	bool "Building with TILE-Gx (64-bit) compiler and toolchain"



config TILEPRO

	def_bool !TILEGX



config 64BIT

	depends on TILEGX

	def_bool y

	def_bool TILEGX



config ARCH_DEFCONFIG

	string
@@ -137,6 +143,31 @@ config NR_CPUS 
	  smaller kernel memory footprint results from using a smaller

	  value on chips with fewer tiles.



if TILEGX



choice

	prompt "Kernel page size"

	default PAGE_SIZE_64KB

	help

	  This lets you select the page size of the kernel.  For best

	  performance on memory-intensive applications, a page size of 64KB

	  is recommended.  For workloads involving many small files, many

	  connections, etc., it may be better to select 16KB, which uses

	  memory more efficiently at some cost in TLB performance.



	  Note that this option is TILE-Gx specific; currently

	  TILEPro page size is set by rebuilding the hypervisor.



config PAGE_SIZE_16KB

	bool "16KB"



config PAGE_SIZE_64KB

	bool "64KB"



endchoice



endif



source "kernel/Kconfig.hz"



config KEXEC

arch/tile/Makefile

+6 −1
Original line number Diff line number Diff line
@@ -34,7 +34,12 @@ LIBGCC_PATH := \ 
  $(shell $(CC) $(KBUILD_CFLAGS) $(KCFLAGS) -print-libgcc-file-name)



# Provide the path to use for "make defconfig".

# We default to the newer TILE-Gx architecture if only "tile" is given.

ifeq ($(ARCH),tile)

        KBUILD_DEFCONFIG := tilegx_defconfig

else

        KBUILD_DEFCONFIG := $(ARCH)_defconfig

endif



# Used as a file extension when useful, e.g. head_$(BITS).o

# Not needed for (e.g.) "$(CC) -m32" since the compiler automatically

arch/tile/include/arch/spr_def_32.h

+56 −0
Original line number Diff line number Diff line
@@ -65,6 +65,31 @@ 
#define SPR_EX_CONTEXT_2_1__ICS_RMASK 0x1

#define SPR_EX_CONTEXT_2_1__ICS_MASK  0x4

#define SPR_FAIL 0x4e09

#define SPR_IDN_AVAIL_EN 0x3e05

#define SPR_IDN_CA_DATA 0x0b00

#define SPR_IDN_DATA_AVAIL 0x0b03

#define SPR_IDN_DEADLOCK_TIMEOUT 0x3406

#define SPR_IDN_DEMUX_CA_COUNT 0x0a05

#define SPR_IDN_DEMUX_COUNT_0 0x0a06

#define SPR_IDN_DEMUX_COUNT_1 0x0a07

#define SPR_IDN_DEMUX_CTL 0x0a08

#define SPR_IDN_DEMUX_QUEUE_SEL 0x0a0a

#define SPR_IDN_DEMUX_STATUS 0x0a0b

#define SPR_IDN_DEMUX_WRITE_FIFO 0x0a0c

#define SPR_IDN_DIRECTION_PROTECT 0x2e05

#define SPR_IDN_PENDING 0x0a0e

#define SPR_IDN_REFILL_EN 0x0e05

#define SPR_IDN_SP_FIFO_DATA 0x0a0f

#define SPR_IDN_SP_FIFO_SEL 0x0a10

#define SPR_IDN_SP_FREEZE 0x0a11

#define SPR_IDN_SP_FREEZE__SP_FRZ_MASK  0x1

#define SPR_IDN_SP_FREEZE__DEMUX_FRZ_MASK  0x2

#define SPR_IDN_SP_FREEZE__NON_DEST_EXT_MASK  0x4

#define SPR_IDN_SP_STATE 0x0a12

#define SPR_IDN_TAG_0 0x0a13

#define SPR_IDN_TAG_1 0x0a14

#define SPR_IDN_TAG_VALID 0x0a15

#define SPR_IDN_TILE_COORD 0x0a16

#define SPR_INTCTRL_0_STATUS 0x4a07

#define SPR_INTCTRL_1_STATUS 0x4807

#define SPR_INTCTRL_2_STATUS 0x4607
@@ -87,12 +112,36 @@ 
#define SPR_INTERRUPT_MASK_SET_1_1 0x480e

#define SPR_INTERRUPT_MASK_SET_2_0 0x460c

#define SPR_INTERRUPT_MASK_SET_2_1 0x460d

#define SPR_MPL_AUX_PERF_COUNT_SET_0 0x6000

#define SPR_MPL_AUX_PERF_COUNT_SET_1 0x6001

#define SPR_MPL_AUX_PERF_COUNT_SET_2 0x6002

#define SPR_MPL_DMA_CPL_SET_0 0x5800

#define SPR_MPL_DMA_CPL_SET_1 0x5801

#define SPR_MPL_DMA_CPL_SET_2 0x5802

#define SPR_MPL_DMA_NOTIFY_SET_0 0x3800

#define SPR_MPL_DMA_NOTIFY_SET_1 0x3801

#define SPR_MPL_DMA_NOTIFY_SET_2 0x3802

#define SPR_MPL_IDN_ACCESS_SET_0 0x0a00

#define SPR_MPL_IDN_ACCESS_SET_1 0x0a01

#define SPR_MPL_IDN_ACCESS_SET_2 0x0a02

#define SPR_MPL_IDN_AVAIL_SET_0 0x3e00

#define SPR_MPL_IDN_AVAIL_SET_1 0x3e01

#define SPR_MPL_IDN_AVAIL_SET_2 0x3e02

#define SPR_MPL_IDN_CA_SET_0 0x3a00

#define SPR_MPL_IDN_CA_SET_1 0x3a01

#define SPR_MPL_IDN_CA_SET_2 0x3a02

#define SPR_MPL_IDN_COMPLETE_SET_0 0x1200

#define SPR_MPL_IDN_COMPLETE_SET_1 0x1201

#define SPR_MPL_IDN_COMPLETE_SET_2 0x1202

#define SPR_MPL_IDN_FIREWALL_SET_0 0x2e00

#define SPR_MPL_IDN_FIREWALL_SET_1 0x2e01

#define SPR_MPL_IDN_FIREWALL_SET_2 0x2e02

#define SPR_MPL_IDN_REFILL_SET_0 0x0e00

#define SPR_MPL_IDN_REFILL_SET_1 0x0e01

#define SPR_MPL_IDN_REFILL_SET_2 0x0e02

#define SPR_MPL_IDN_TIMER_SET_0 0x3400

#define SPR_MPL_IDN_TIMER_SET_1 0x3401

#define SPR_MPL_IDN_TIMER_SET_2 0x3402

#define SPR_MPL_INTCTRL_0_SET_0 0x4a00

#define SPR_MPL_INTCTRL_0_SET_1 0x4a01

#define SPR_MPL_INTCTRL_0_SET_2 0x4a02
@@ -102,6 +151,9 @@ 
#define SPR_MPL_INTCTRL_2_SET_0 0x4600

#define SPR_MPL_INTCTRL_2_SET_1 0x4601

#define SPR_MPL_INTCTRL_2_SET_2 0x4602

#define SPR_MPL_PERF_COUNT_SET_0 0x4200

#define SPR_MPL_PERF_COUNT_SET_1 0x4201

#define SPR_MPL_PERF_COUNT_SET_2 0x4202

#define SPR_MPL_SN_ACCESS_SET_0 0x0800

#define SPR_MPL_SN_ACCESS_SET_1 0x0801

#define SPR_MPL_SN_ACCESS_SET_2 0x0802
@@ -181,6 +233,7 @@ 
#define SPR_UDN_DEMUX_STATUS 0x0c0d

#define SPR_UDN_DEMUX_WRITE_FIFO 0x0c0e

#define SPR_UDN_DIRECTION_PROTECT 0x3005

#define SPR_UDN_PENDING 0x0c10

#define SPR_UDN_REFILL_EN 0x1005

#define SPR_UDN_SP_FIFO_DATA 0x0c11

#define SPR_UDN_SP_FIFO_SEL 0x0c12
@@ -195,6 +248,9 @@ 
#define SPR_UDN_TAG_3 0x0c18

#define SPR_UDN_TAG_VALID 0x0c19

#define SPR_UDN_TILE_COORD 0x0c1a

#define SPR_WATCH_CTL 0x4209

#define SPR_WATCH_MASK 0x420a

#define SPR_WATCH_VAL 0x420b



#endif /* !defined(__ARCH_SPR_DEF_H__) */

arch/tile/include/arch/spr_def_64.h

+43 −0
Original line number Diff line number Diff line
@@ -52,6 +52,13 @@ 
#define SPR_EX_CONTEXT_2_1__ICS_RMASK 0x1

#define SPR_EX_CONTEXT_2_1__ICS_MASK  0x4

#define SPR_FAIL 0x2707

#define SPR_IDN_AVAIL_EN 0x1a05

#define SPR_IDN_DATA_AVAIL 0x0a80

#define SPR_IDN_DEADLOCK_TIMEOUT 0x1806

#define SPR_IDN_DEMUX_COUNT_0 0x0a05

#define SPR_IDN_DEMUX_COUNT_1 0x0a06

#define SPR_IDN_DIRECTION_PROTECT 0x1405

#define SPR_IDN_PENDING 0x0a08

#define SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK 0x1

#define SPR_INTCTRL_0_STATUS 0x2505

#define SPR_INTCTRL_1_STATUS 0x2405
@@ -88,9 +95,27 @@ 
#define SPR_IPI_MASK_SET_0 0x1f0a

#define SPR_IPI_MASK_SET_1 0x1e0a

#define SPR_IPI_MASK_SET_2 0x1d0a

#define SPR_MPL_AUX_PERF_COUNT_SET_0 0x2100

#define SPR_MPL_AUX_PERF_COUNT_SET_1 0x2101

#define SPR_MPL_AUX_PERF_COUNT_SET_2 0x2102

#define SPR_MPL_AUX_TILE_TIMER_SET_0 0x1700

#define SPR_MPL_AUX_TILE_TIMER_SET_1 0x1701

#define SPR_MPL_AUX_TILE_TIMER_SET_2 0x1702

#define SPR_MPL_IDN_ACCESS_SET_0 0x0a00

#define SPR_MPL_IDN_ACCESS_SET_1 0x0a01

#define SPR_MPL_IDN_ACCESS_SET_2 0x0a02

#define SPR_MPL_IDN_AVAIL_SET_0 0x1a00

#define SPR_MPL_IDN_AVAIL_SET_1 0x1a01

#define SPR_MPL_IDN_AVAIL_SET_2 0x1a02

#define SPR_MPL_IDN_COMPLETE_SET_0 0x0500

#define SPR_MPL_IDN_COMPLETE_SET_1 0x0501

#define SPR_MPL_IDN_COMPLETE_SET_2 0x0502

#define SPR_MPL_IDN_FIREWALL_SET_0 0x1400

#define SPR_MPL_IDN_FIREWALL_SET_1 0x1401

#define SPR_MPL_IDN_FIREWALL_SET_2 0x1402

#define SPR_MPL_IDN_TIMER_SET_0 0x1800

#define SPR_MPL_IDN_TIMER_SET_1 0x1801

#define SPR_MPL_IDN_TIMER_SET_2 0x1802

#define SPR_MPL_INTCTRL_0_SET_0 0x2500

#define SPR_MPL_INTCTRL_0_SET_1 0x2501

#define SPR_MPL_INTCTRL_0_SET_2 0x2502
@@ -100,6 +125,21 @@ 
#define SPR_MPL_INTCTRL_2_SET_0 0x2300

#define SPR_MPL_INTCTRL_2_SET_1 0x2301

#define SPR_MPL_INTCTRL_2_SET_2 0x2302

#define SPR_MPL_IPI_0 0x1f04

#define SPR_MPL_IPI_0_SET_0 0x1f00

#define SPR_MPL_IPI_0_SET_1 0x1f01

#define SPR_MPL_IPI_0_SET_2 0x1f02

#define SPR_MPL_IPI_1 0x1e04

#define SPR_MPL_IPI_1_SET_0 0x1e00

#define SPR_MPL_IPI_1_SET_1 0x1e01

#define SPR_MPL_IPI_1_SET_2 0x1e02

#define SPR_MPL_IPI_2 0x1d04

#define SPR_MPL_IPI_2_SET_0 0x1d00

#define SPR_MPL_IPI_2_SET_1 0x1d01

#define SPR_MPL_IPI_2_SET_2 0x1d02

#define SPR_MPL_PERF_COUNT_SET_0 0x2000

#define SPR_MPL_PERF_COUNT_SET_1 0x2001

#define SPR_MPL_PERF_COUNT_SET_2 0x2002

#define SPR_MPL_UDN_ACCESS_SET_0 0x0b00

#define SPR_MPL_UDN_ACCESS_SET_1 0x0b01

#define SPR_MPL_UDN_ACCESS_SET_2 0x0b02
@@ -167,6 +207,9 @@ 
#define SPR_UDN_DEMUX_COUNT_2 0x0b07

#define SPR_UDN_DEMUX_COUNT_3 0x0b08

#define SPR_UDN_DIRECTION_PROTECT 0x1505

#define SPR_UDN_PENDING 0x0b0a

#define SPR_WATCH_MASK 0x200a

#define SPR_WATCH_VAL 0x200b



#endif /* !defined(__ARCH_SPR_DEF_H__) */

arch/tile/include/asm/Kbuild

+1 −1
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ include include/asm-generic/Kbuild.asm 


header-y += ../arch/



header-y += cachectl.h

header-y += ucontext.h

header-y += hardwall.h
@@ -21,7 +22,6 @@ generic-y += ipcbuf.h 
generic-y += irq_regs.h

generic-y += kdebug.h

generic-y += local.h

generic-y += module.h

generic-y += msgbuf.h

generic-y += mutex.h

generic-y += param.h