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Commit fa1b42b4 authored by Dave Liu's avatar Dave Liu Committed by Kumar Gala
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powerpc/qe: Update the SNUM table for MPC8569 Rev2.0 



The MPC8569 Rev2.0 has the correct SNUM table as QE Reference Manual, we
must follow it.

However the Rev1.0 silicon need the old SNUM table as workaround due to
Rev1.0 silicon SNUM erratum.

So, we support both snum table, and choose the one FDT tell us.
And u-boot will fixup FDT according to SPRN_SVR.

Signed-off-by: default avatarLiu Yu <yu.liu@freescale.com>
Signed-off-by: default avatarDave Liu <daveliu@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 8a57d734

arch/powerpc/sysdev/qe_lib/qe.c

+20 −2
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.

 * Copyright (C) 2006-2010 Freescale Semicondutor, Inc. All rights reserved.

 *

 * Authors: 	Shlomi Gridish <gridish@freescale.com>

 * 		Li Yang <leoli@freescale.com>
@@ -266,7 +266,19 @@ EXPORT_SYMBOL(qe_clock_source); 
static void qe_snums_init(void)

{

	int i;

	static const u8 snum_init[] = {

	static const u8 snum_init_76[] = {

		0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,

		0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,

		0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9,

		0xD8, 0xD9, 0xE8, 0xE9, 0x44, 0x45, 0x4C, 0x4D,

		0x54, 0x55, 0x5C, 0x5D, 0x64, 0x65, 0x6C, 0x6D,

		0x74, 0x75, 0x7C, 0x7D, 0x84, 0x85, 0x8C, 0x8D,

		0x94, 0x95, 0x9C, 0x9D, 0xA4, 0xA5, 0xAC, 0xAD,

		0xB4, 0xB5, 0xBC, 0xBD, 0xC4, 0xC5, 0xCC, 0xCD,

		0xD4, 0xD5, 0xDC, 0xDD, 0xE4, 0xE5, 0xEC, 0xED,

		0xF4, 0xF5, 0xFC, 0xFD,

	};

	static const u8 snum_init_46[] = {

		0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,

		0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,

		0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9,
@@ -274,9 +286,15 @@ static void qe_snums_init(void) 
		0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,

		0x68, 0x69, 0x78, 0x79, 0x80, 0x81,

	};

	static const u8 *snum_init;



	qe_num_of_snum = qe_get_num_of_snums();



	if (qe_num_of_snum == 76)

		snum_init = snum_init_76;

	else

		snum_init = snum_init_46;



	for (i = 0; i < qe_num_of_snum; i++) {

		snums[i].num = snum_init[i];

		snums[i].state = QE_SNUM_STATE_FREE;

drivers/net/ethernet/freescale/ucc_geth.c

+4 −2
Original line number Diff line number Diff line
@@ -3945,6 +3945,8 @@ static int ucc_geth_probe(struct platform_device* ofdev) 
		}



	if (max_speed == SPEED_1000) {

		unsigned int snums = qe_get_num_of_snums();



		/* configure muram FIFOs for gigabit operation */

		ug_info->uf_info.urfs = UCC_GETH_URFS_GIGA_INIT;

		ug_info->uf_info.urfet = UCC_GETH_URFET_GIGA_INIT;
@@ -3954,11 +3956,11 @@ static int ucc_geth_probe(struct platform_device* ofdev) 
		ug_info->uf_info.utftt = UCC_GETH_UTFTT_GIGA_INIT;

		ug_info->numThreadsTx = UCC_GETH_NUM_OF_THREADS_4;



		/* If QE's snum number is 46 which means we need to support

		/* If QE's snum number is 46/76 which means we need to support

		 * 4 UECs at 1000Base-T simultaneously, we need to allocate

		 * more Threads to Rx.

		 */

		if (qe_get_num_of_snums() == 46)

		if ((snums == 76) || (snums == 46))

			ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_6;

		else

			ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_4;