ARM: dts: msm: Add dt entries for kona sound card (f9912cbe) · Commits · e / devices / android_kernel_fairphone_FP4

arch/arm64/boot/dts/qcom/kona-audio-overlay.dtsi

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		// SPDX-License-Identifier: GPL-2.0
		/*
		* Copyright (c) 2018, The Linux Foundation. All rights reserved.
		*/

		#include <dt-bindings/clock/qcom,audio-ext-clk.h>
		#include <dt-bindings/sound/audio-codec-port-types.h>

		&bolero {
		qcom,num-macros = <4>;
		tx_macro: tx-macro@3220000 {
		compatible = "qcom,tx-macro";
		reg = <0x3220000 0x0>;
		clock-names = "tx_core_clk", "tx_npl_clk";
		clocks = <&clock_audio_tx_1 0>,
		<&clock_audio_tx_2 0>;
		qcom,tx-swr-gpios = <&tx_swr_gpios>;
		qcom,tx-dmic-sample-rate = <2400000>;
		swr2: tx_swr_master {
		compatible = "qcom,swr-mstr";
		#address-cells = <2>;
		#size-cells = <0>;
		qcom,swr_master_id = <3>;
		qcom,mipi-sdw-block-packing-mode = <1>;
		swrm-io-base = <0x3230000 0x0>;
		interrupts = <0 297 0>, <0 528 0>;
		interrupt-names = "swr_master_irq", "swr_wake_irq";
		qcom,swr-wakeup-required = <1>;
		qcom,swr-num-ports = <5>;
		qcom,swr-port-mapping = <1 PCM_OUT1 0xF>,
		<2 ADC1 0x1>, <2 ADC2 0x2>,
		<3 ADC3 0x1>, <3 ADC4 0x2>,
		<4 DMIC0 0x1>, <4 DMIC1 0x2>,
		<4 DMIC2 0x4>, <4 DMIC3 0x8>,
		<5 DMIC4 0x1>, <5 DMIC5 0x2>,
		<5 DMIC6 0x4>, <5 DMIC7 0x8>;
		qcom,swr-num-dev = <1>;
		qcom,swr-clock-stop-mode0 = <1>;
		wcd938x_tx_slave: wcd938x-tx-slave {
		compatible = "qcom,wcd938x-slave";
		reg = <0x0D 0x01170223>;
		};
		};
		};

		rx_macro: rx-macro@3200000 {
		compatible = "qcom,rx-macro";
		reg = <0x3200000 0x0>;
		clock-names = "rx_core_clk", "rx_npl_clk";
		clocks = <&clock_audio_rx_1 0>,
		<&clock_audio_rx_2 0>;
		qcom,rx-swr-gpios = <&rx_swr_gpios>;
		qcom,rx_mclk_mode_muxsel = <0x033240D8>;
		qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x00 0x1E>;
		swr1: rx_swr_master {
		compatible = "qcom,swr-mstr";
		#address-cells = <2>;
		#size-cells = <0>;
		qcom,swr_master_id = <2>;
		qcom,mipi-sdw-block-packing-mode = <1>;
		swrm-io-base = <0x3210000 0x0>;
		interrupts = <0 298 0>;
		interrupt-names = "swr_master_irq";
		qcom,swr-num-ports = <5>;
		qcom,swr-port-mapping = <1 HPH_L 0x1>,
		<1 HPH_R 0x2>, <2 CLSH 0x3>,
		<3 COMP_L 0x1>, <3 COMP_R 0x2>,
		<4 LO 0x1>, <5 DSD_L 0x1>,
		<5 DSD_R 0x2>;
		qcom,swr-num-dev = <1>;
		qcom,swr-clock-stop-mode0 = <1>;
		wcd938x_rx_slave: wcd938x-rx-slave {
		compatible = "qcom,wcd938x-slave";
		reg = <0x0D 0x01170224>;
		};
		};
		};

		wsa_macro: wsa-macro@3240000 {
		compatible = "qcom,wsa-macro";
		reg = <0x3240000 0x0>;
		clock-names = "wsa_core_clk", "wsa_npl_clk";
		clocks = <&clock_audio_wsa_1 0>,
		<&clock_audio_wsa_2 0>;
		qcom,wsa-swr-gpios = <&wsa_swr_gpios>;
		qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x00 0x1E>;
		swr0: wsa_swr_master {
		compatible = "qcom,swr-mstr";
		#address-cells = <2>;
		#size-cells = <0>;
		qcom,swr_master_id = <1>;
		qcom,mipi-sdw-block-packing-mode = <0>;
		swrm-io-base = <0x3250000 0x0>;
		interrupts = <0 202 0>;
		interrupt-names = "swr_master_irq";
		qcom,swr-num-ports = <8>;
		qcom,swr-port-mapping = <1 SPKR_L 0x1>,
		<2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>,
		<4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>,
		<6 SPKR_R_BOOST 0x3>, <7 SPKR_L_VI 0x3>,
		<8 SPKR_R_VI 0x3>;
		qcom,swr-num-dev = <2>;
		wsa881x_0211: wsa881x@20170211 {
		compatible = "qcom,wsa881x";
		reg = <0x10 0x20170211>;
		qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
		};

		wsa881x_0212: wsa881x@20170212 {
		compatible = "qcom,wsa881x";
		reg = <0x10 0x20170212>;
		qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
		};

		wsa881x_0213: wsa881x@21170213 {
		compatible = "qcom,wsa881x";
		reg = <0x10 0x21170213>;
		qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
		};

		wsa881x_0214: wsa881x@21170214 {
		compatible = "qcom,wsa881x";
		reg = <0x10 0x21170214>;
		qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
		};
		};

		};

		va_macro: va-macro@3370000 {
		compatible = "qcom,va-macro";
		reg = <0x3370000 0x0>;
		};

		wcd938x_codec: wcd938x-codec {
		compatible = "qcom,wcd938x-codec";
		qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
		<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x3 0 CLSH>,
		<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
		<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
		<4 DSD_R 0x2 0 DSD_R>;
		qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
		<0 ADC2 0x1 0 ADC2>, <1 ADC3 0x2 0 ADC3>,
		<1 ADC4 0x2 0 ADC4>, <2 DMIC0 0x1 0 DMIC0>,
		<2 DMIC1 0x2 0 DMIC1>, <2 DMIC3 0x8 0 DMIC3>,
		<2 MBHC 0x4 0 DMIC2>, <3 DMIC2 0x1 0 DMIC4>,
		<3 DMIC4 0x1 0 DMIC4>, <3 DMIC5 0x2 0 DMIC5>,
		<3 DMIC6 0x4 0 DMIC6>, <3 DMIC7 0x8 0 DMIC7>;

		qcom,wcd-rst-gpio-node = <&wcd938x_rst_gpio>;
		qcom,rx-slave = <&wcd938x_rx_slave>;
		qcom,tx-slave = <&wcd938x_tx_slave>;

		cdc-vdd-rxtx-supply = <&S4A>;
		qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
		qcom,cdc-vdd-rxtx-current = <30000>;

		cdc-vddio-supply = <&S4A>;
		qcom,cdc-vddio-voltage = <1800000 1800000>;
		qcom,cdc-vddio-current = <30000>;

		cdc-vdd-buck-supply = <&S4A>;
		qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
		qcom,cdc-vdd-buck-current = <650000>;

		cdc-vdd-mic-bias-supply = <&BOB>;
		qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>;
		qcom,cdc-vdd-mic-bias-current = <30000>;

		qcom,cdc-micbias1-mv = <1800>;
		qcom,cdc-micbias2-mv = <1800>;
		qcom,cdc-micbias3-mv = <1800>;

		qcom,cdc-static-supplies = "cdc-vdd-rxtx",
		"cdc-vddio",
		"cdc-vdd-buck",
		"cdc-vdd-mic-bias";
		};

		};

		&soc {
		cdc_dmic01_gpios: cdc_dmic01_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
		pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>;
		};

		cdc_dmic23_gpios: cdc_dmic23_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>;
		pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>;
		};

		wsa_swr_gpios: wsa_swr_clk_data_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>;
		pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>;
		};

		rx_swr_gpios: rx_swr_clk_data_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active>;
		pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep>;
		};

		tx_swr_gpios: tx_swr_clk_data_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&tx_swr_clk_active &tx_swr_data1_active
		&tx_swr_data2_active>;
		pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data1_sleep
		&tx_swr_data2_sleep>;
		};

		wsa_spkr_en1: wsa_spkr_en1_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&spkr_1_sd_n_active>;
		pinctrl-1 = <&spkr_1_sd_n_sleep>;
		};

		wsa_spkr_en2: wsa_spkr_en2_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&spkr_2_sd_n_active>;
		pinctrl-1 = <&spkr_2_sd_n_sleep>;
		};

		wcd938x_rst_gpio: msm_cdc_pinctrl@32 {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&wcd938x_reset_active>;
		pinctrl-1 = <&wcd938x_reset_sleep>;
		};

		clock_audio_wsa_1: wsa_core_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_2>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x309>;
		#clock-cells = <1>;
		};

		clock_audio_wsa_2: wsa_npl_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_3>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x30A>;
		#clock-cells = <1>;
		};

		clock_audio_va: va_core_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x30B>;
		#clock-cells = <1>;
		};

		clock_audio_rx_1: rx_core_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
		qcom,codec-lpass-ext-clk-freq = <22579200>;
		qcom,codec-lpass-clk-id = <0x30E>;
		#clock-cells = <1>;
		};

		clock_audio_rx_2: rx_npl_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
		qcom,codec-lpass-ext-clk-freq = <22579200>;
		qcom,codec-lpass-clk-id = <0x30F>;
		#clock-cells = <1>;
		};

		clock_audio_tx_1: tx_core_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x30C>;
		#clock-cells = <1>;
		};

		clock_audio_tx_2: tx_npl_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x30D>;
		#clock-cells = <1>;
		};
		};

arch/arm64/boot/dts/qcom/kona-audio.dtsi

+108 −0

Original line number	Diff line number	Diff line
		@@ -20,3 +20,111 @@
		qcom,clk-mult = <10>;
		};
		};

		&audio_apr {
		q6core: qcom,q6core-audio {
		compatible = "qcom,q6core-audio";
		bolero: bolero-cdc {
		compatible = "qcom,bolero-codec";
		tx_macro: tx-macro@3220000 {
		swr2: tx_swr_master {
		};
		};

		rx_macro: rx-macro@3200000 {
		swr1: rx_swr_master {
		};
		};

		wsa_macro: wsa-macro@3240000 {
		swr0: wsa_swr_master {
		};
		};
		};
		};
		};

		&q6core {
		kona_snd: sound {
		compatible = "qcom,kona-asoc-snd";
		qcom,mi2s-audio-intf = <1>;
		qcom,auxpcm-audio-intf = <1>;
		qcom,wcn-btfm = <1>;

		asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
		<&loopback>, <&compress>, <&hostless>,
		<&afe>, <&lsm>, <&routing>, <&compr>,
		<&pcm_noirq>;
		asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
		"msm-pcm-dsp.2", "msm-voip-dsp",
		"msm-pcm-voice", "msm-pcm-loopback",
		"msm-compress-dsp", "msm-pcm-hostless",
		"msm-pcm-afe", "msm-lsm-client",
		"msm-pcm-routing", "msm-compr-dsp",
		"msm-pcm-dsp-noirq";
		asoc-cpu = <&dai_dp>,
		<&dai_mi2s0>, <&dai_mi2s1>,
		<&dai_mi2s2>, <&dai_mi2s3>,
		<&dai_mi2s4>, <&dai_pri_auxpcm>,
		<&dai_sec_auxpcm>, <&dai_tert_auxpcm>,
		<&dai_quat_auxpcm>, <&dai_quin_auxpcm>,
		<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
		<&afe_proxy_tx>, <&incall_record_rx>,
		<&incall_record_tx>, <&incall_music_rx>,
		<&incall_music_2_rx>,
		<&usb_audio_rx>, <&usb_audio_tx>,
		<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
		<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
		<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
		<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
		<&dai_quin_tdm_rx_0>, <&dai_quin_tdm_tx_0>,
		<&wsa_cdc_dma_0_rx>, <&wsa_cdc_dma_0_tx>,
		<&wsa_cdc_dma_1_rx>, <&wsa_cdc_dma_1_tx>,
		<&wsa_cdc_dma_2_tx>,
		<&rx_cdc_dma_0_rx>, <&tx_cdc_dma_0_tx>,
		<&rx_cdc_dma_1_rx>, <&tx_cdc_dma_1_tx>,
		<&rx_cdc_dma_2_rx>, <&tx_cdc_dma_2_tx>,
		<&rx_cdc_dma_3_rx>, <&tx_cdc_dma_3_tx>,
		<&rx_cdc_dma_4_rx>, <&tx_cdc_dma_4_tx>,
		<&rx_cdc_dma_5_rx>, <&tx_cdc_dma_5_tx>,
		<&rx_cdc_dma_6_rx>, <&rx_cdc_dma_7_rx>;
		asoc-cpu-names = "msm-dai-q6-dp.24608",
		"msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
		"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
		"msm-dai-q6-mi2s.4", "msm-dai-q6-auxpcm.1",
		"msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3",
		"msm-dai-q6-auxpcm.4", "msm-dai-q6-auxpcm.5",
		"msm-dai-q6-dev.224",
		"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
		"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
		"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
		"msm-dai-q6-dev.32770", "msm-dai-q6-dev.16398",
		"msm-dai-q6-dev.16399", "msm-dai-q6-dev.16401",
		"msm-dai-q6-dev.16400",
		"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
		"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
		"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
		"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36897",
		"msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913",
		"msm-dai-q6-tdm.36928", "msm-dai-q6-tdm.36929",
		"msm-dai-cdc-dma-dev.45056",
		"msm-dai-cdc-dma-dev.45057",
		"msm-dai-cdc-dma-dev.45058",
		"msm-dai-cdc-dma-dev.45059",
		"msm-dai-cdc-dma-dev.45061",
		"msm-dai-cdc-dma-dev.45104",
		"msm-dai-cdc-dma-dev.45105",
		"msm-dai-cdc-dma-dev.45106",
		"msm-dai-cdc-dma-dev.45107",
		"msm-dai-cdc-dma-dev.45108",
		"msm-dai-cdc-dma-dev.45109",
		"msm-dai-cdc-dma-dev.45110",
		"msm-dai-cdc-dma-dev.45111",
		"msm-dai-cdc-dma-dev.45112",
		"msm-dai-cdc-dma-dev.45113",
		"msm-dai-cdc-dma-dev.45114",
		"msm-dai-cdc-dma-dev.45115",
		"msm-dai-cdc-dma-dev.45116",
		"msm-dai-cdc-dma-dev.45118";
		};
		};

arch/arm64/boot/dts/qcom/kona-pinctrl.dtsi

+382 −0

Original line number	Diff line number	Diff line
		@@ -188,5 +188,387 @@
		};
		};
		};

		wsa_swr_clk_pin {
		wsa_swr_clk_sleep: wsa_swr_clk_sleep {
		mux {
		pins = "gpio156";
		function = "WSA_CLK";
		};

		config {
		pins = "gpio156";
		drive-strength = <2>;
		bias-bus-hold;
		};
		};

		wsa_swr_clk_active: wsa_swr_clk_active {
		mux {
		pins = "gpio156";
		function = "WSA_CLK";
		};

		config {
		pins = "gpio156";
		drive-strength = <2>;
		bias-bus-hold;
		};
		};
		};

		wsa_swr_data_pin {
		wsa_swr_data_sleep: wsa_swr_data_sleep {
		mux {
		pins = "gpio157";
		function = "WSA_DATA";
		};

		config {
		pins = "gpio157";
		drive-strength = <4>;
		bias-bus-hold;
		};
		};

		wsa_swr_data_active: wsa_swr_data_active {
		mux {
		pins = "gpio157";
		function = "WSA_DATA";
		};

		config {
		pins = "gpio157";
		drive-strength = <4>;
		bias-bus-hold;
		};
		};
		};

		/* WSA speaker reset pins */
		spkr_1_sd_n {
		spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
		mux {
		pins = "gpio26";
		function = "gpio";
		};

		config {
		pins = "gpio26";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down;
		input-enable;
		};
		};

		spkr_1_sd_n_active: spkr_1_sd_n_active {
		mux {
		pins = "gpio26";
		function = "gpio";
		};

		config {
		pins = "gpio26";
		drive-strength = <16>; /* 16 mA */
		bias-disable;
		output-high;
		};
		};
		};

		spkr_2_sd_n {
		spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
		mux {
		pins = "gpio127";
		function = "gpio";
		};

		config {
		pins = "gpio127";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down;
		input-enable;
		};
		};

		spkr_2_sd_n_active: spkr_2_sd_n_active {
		mux {
		pins = "gpio127";
		function = "gpio";
		};

		config {
		pins = "gpio127";
		drive-strength = <16>; /* 16 mA */
		bias-disable;
		output-high;
		};
		};
		};

		wcd938x_reset_active: wcd938x_reset_active {
		mux {
		pins = "gpio32";
		function = "func2";
		};

		config {
		pins = "gpio32";
		drive-strength = <16>;
		output-high;
		};
		};

		wcd938x_reset_sleep: wcd938x_reset_sleep {
		mux {
		pins = "gpio32";
		function = "func2";
		};

		config {
		pins = "gpio32";
		drive-strength = <16>;
		bias-disable;
		output-low;
		};
		};

		cdc_dmic01_clk_active: dmic01_clk_active {
		mux {
		pins = "gpio152";
		function = "func1";
		};

		config {
		pins = "gpio152";
		drive-strength = <8>;
		output-high;
		};
		};

		cdc_dmic01_clk_sleep: dmic01_clk_sleep {
		mux {
		pins = "gpio152";
		function = "func1";
		};

		config {
		pins = "gpio152";
		drive-strength = <2>;
		bias-disable;
		output-low;
		};
		};

		cdc_dmic01_data_active: dmic01_data_active {
		mux {
		pins = "gpio153";
		function = "func1";
		};

		config {
		pins = "gpio153";
		drive-strength = <8>;
		input-enable;
		};
		};

		cdc_dmic01_data_sleep: dmic01_data_sleep {
		mux {
		pins = "gpio153";
		function = "func1";
		};

		config {
		pins = "gpio27";
		drive-strength = <2>;
		pull-down;
		input-enable;
		};
		};

		cdc_dmic23_clk_active: dmic23_clk_active {
		mux {
		pins = "gpio154";
		function = "func1";
		};

		config {
		pins = "gpio154";
		drive-strength = <8>;
		output-high;
		};
		};

		cdc_dmic23_clk_sleep: dmic23_clk_sleep {
		mux {
		pins = "gpio154";
		function = "func1";
		};

		config {
		pins = "gpio154";
		drive-strength = <2>;
		bias-disable;
		output-low;
		};
		};

		cdc_dmic23_data_active: dmic23_data_active {
		mux {
		pins = "gpio155";
		function = "func1";
		};

		config {
		pins = "gpio155";
		drive-strength = <8>;
		input-enable;
		};
		};

		cdc_dmic23_data_sleep: dmic23_data_sleep {
		mux {
		pins = "gpio155";
		function = "func1";
		};

		config {
		pins = "gpio155";
		drive-strength = <2>;
		pull-down;
		input-enable;
		};
		};

		tx_swr_clk_sleep: tx_swr_clk_sleep {
		mux {
		pins = "gpio146";
		function = "func2";
		};

		config {
		pins = "gpio146";
		drive-strength = <2>;
		bias-bus-hold;
		};
		};

		tx_swr_clk_active: tx_swr_clk_active {
		mux {
		pins = "gpio146";
		function = "func2";
		};

		config {
		pins = "gpio146";
		drive-strength = <8>;
		bias-bus-hold;
		};
		};

		tx_swr_data1_sleep: tx_swr_data1_sleep {
		mux {
		pins = "gpio147";
		function = "func3";
		};

		config {
		pins = "gpio147";
		drive-strength = <2>;
		bias-bus-hold;
		};
		};

		tx_swr_data1_active: tx_swr_data1_active {
		mux {
		pins = "gpio147";
		function = "func3";
		};

		config {
		pins = "gpio147";
		drive-strength = <8>;
		bias-bus-hold;
		};
		};

		tx_swr_data2_sleep: tx_swr_data2_sleep {
		mux {
		pins = "gpio148";
		function = "func2";
		};

		config {
		pins = "gpio148";
		drive-strength = <2>;
		bias-bus-hold;
		};
		};

		tx_swr_data2_active: tx_swr_data2_active {
		mux {
		pins = "gpio148";
		function = "func2";
		};

		config {
		pins = "gpio148";
		drive-strength = <8>;
		bias-bus-hold;
		};
		};

		rx_swr_clk_sleep: rx_swr_clk_sleep {
		mux {
		pins = "gpio149";
		function = "func2";
		};

		config {
		pins = "gpio149";
		drive-strength = <2>;
		bias-bus-hold;
		};
		};

		rx_swr_clk_active: rx_swr_clk_active {
		mux {
		pins = "gpio149";
		function = "func2";
		};

		config {
		pins = "gpio149";
		drive-strength = <8>;
		bias-bus-hold;
		};
		};

		rx_swr_data_sleep: rx_swr_data_sleep {
		mux {
		pins = "gpio150", "gpio151";
		function = "func2";
		};

		config {
		pins = "gpio150", "gpio151";
		drive-strength = <2>;
		bias-bus-hold;
		};
		};

		rx_swr_data_active: rx_swr_data_active {
		mux {
		pins = "gpio150", "gpio151";
		function = "func2";
		};

		config {
		pins = "gpio150", "gpio151";
		drive-strength = <8>;
		bias-bus-hold;
		};
		};
		};
		};