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Commit f986e31b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'gpio-v4.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio 

Pull GPIO fixes from Linus Walleij:
 "A few overdue GPIO patches for the v4.12 kernel.

   - Fix debounce logic on the Aspeed platform.

   - Fix the "virtual gpio" things on the Intel Crystal Cove.

   - Fix the blink counter selection on the MVEBU platform"

* tag 'gpio-v4.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
  gpio: mvebu: fix gpio bank registration when pwm is used
  gpio: mvebu: fix blink counter register selection
  MAINTAINERS: remove self from GPIO maintainers
  gpio: crystalcove: Do not write regular gpio registers for virtual GPIOs
  gpio: aspeed: Don't attempt to debounce if disabled
parents 9cd9cb0b fc7a9068

MAINTAINERS

+0 −1
Original line number Original line Diff line number Diff line
@@ -5667,7 +5667,6 @@ F: tools/testing/selftests/gpio/ 




GPIO SUBSYSTEM

GPIO SUBSYSTEM

M:	Linus Walleij <linus.walleij@linaro.org>

M:	Linus Walleij <linus.walleij@linaro.org>

M:	Alexandre Courbot <gnurou@gmail.com>

L:	linux-gpio@vger.kernel.org

L:	linux-gpio@vger.kernel.org

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git

S:	Maintained

S:	Maintained

drivers/gpio/gpio-aspeed.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -646,6 +646,9 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset, 
	int rc;

	int rc;

	int i;

	int i;





	if (!gpio->clk)

		return -EINVAL;



	rc = usecs_to_cycles(gpio, usecs, &requested_cycles);

	rc = usecs_to_cycles(gpio, usecs, &requested_cycles);

	if (rc < 0) {

	if (rc < 0) {

		dev_warn(chip->parent, "Failed to convert %luus to cycles at %luHz: %d\n",

		dev_warn(chip->parent, "Failed to convert %luus to cycles at %luHz: %d\n",

drivers/gpio/gpio-crystalcove.c

+36 −18
Original line number Original line Diff line number Diff line
@@ -90,8 +90,18 @@ static inline int to_reg(int gpio, enum ctrl_register reg_type) 
{

{

	int reg;

	int reg;





	if (gpio == 94)

	if (gpio >= CRYSTALCOVE_GPIO_NUM) {

		/*

		 * Virtual GPIO called from ACPI, for now we only support

		 * the panel ctl.

		 */

		switch (gpio) {

		case 0x5e:

			return GPIOPANELCTL;

			return GPIOPANELCTL;

		default:

			return -EOPNOTSUPP;

		}

	}





	if (reg_type == CTRL_IN) {

	if (reg_type == CTRL_IN) {

		if (gpio < 8)

		if (gpio < 8)
@@ -130,36 +140,36 @@ static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio) 
static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)

static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)

{

{

	struct crystalcove_gpio *cg = gpiochip_get_data(chip);

	struct crystalcove_gpio *cg = gpiochip_get_data(chip);

	int reg = to_reg(gpio, CTRL_OUT);





	if (gpio > CRYSTALCOVE_VGPIO_NUM)

	if (reg < 0)

		return 0;

		return 0;





	return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT),

	return regmap_write(cg->regmap, reg, CTLO_INPUT_SET);

			    CTLO_INPUT_SET);

}

}





static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio,

static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio,

				    int value)

				    int value)

{

{

	struct crystalcove_gpio *cg = gpiochip_get_data(chip);

	struct crystalcove_gpio *cg = gpiochip_get_data(chip);

	int reg = to_reg(gpio, CTRL_OUT);





	if (gpio > CRYSTALCOVE_VGPIO_NUM)

	if (reg < 0)

		return 0;

		return 0;





	return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT),

	return regmap_write(cg->regmap, reg, CTLO_OUTPUT_SET | value);

			    CTLO_OUTPUT_SET | value);

}

}





static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio)

static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio)

{

{

	struct crystalcove_gpio *cg = gpiochip_get_data(chip);

	struct crystalcove_gpio *cg = gpiochip_get_data(chip);

	int ret;

	unsigned int val;

	unsigned int val;

	int ret, reg = to_reg(gpio, CTRL_IN);





	if (gpio > CRYSTALCOVE_VGPIO_NUM)

	if (reg < 0)

		return 0;

		return 0;





	ret = regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &val);

	ret = regmap_read(cg->regmap, reg, &val);

	if (ret)

	if (ret)

		return ret;

		return ret;
@@ -170,14 +180,15 @@ static void crystalcove_gpio_set(struct gpio_chip *chip, 
				 unsigned gpio, int value)

				 unsigned gpio, int value)

{

{

	struct crystalcove_gpio *cg = gpiochip_get_data(chip);

	struct crystalcove_gpio *cg = gpiochip_get_data(chip);

	int reg = to_reg(gpio, CTRL_OUT);





	if (gpio > CRYSTALCOVE_VGPIO_NUM)

	if (reg < 0)

		return;

		return;





	if (value)

	if (value)

		regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 1);

		regmap_update_bits(cg->regmap, reg, 1, 1);

	else

	else

		regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 0);

		regmap_update_bits(cg->regmap, reg, 1, 0);

}

}





static int crystalcove_irq_type(struct irq_data *data, unsigned type)

static int crystalcove_irq_type(struct irq_data *data, unsigned type)
@@ -185,6 +196,9 @@ static int crystalcove_irq_type(struct irq_data *data, unsigned type) 
	struct crystalcove_gpio *cg =

	struct crystalcove_gpio *cg =

		gpiochip_get_data(irq_data_get_irq_chip_data(data));

		gpiochip_get_data(irq_data_get_irq_chip_data(data));





	if (data->hwirq >= CRYSTALCOVE_GPIO_NUM)

		return 0;



	switch (type) {

	switch (type) {

	case IRQ_TYPE_NONE:

	case IRQ_TYPE_NONE:

		cg->intcnt_value = CTLI_INTCNT_DIS;

		cg->intcnt_value = CTLI_INTCNT_DIS;
@@ -235,18 +249,22 @@ static void crystalcove_irq_unmask(struct irq_data *data) 
	struct crystalcove_gpio *cg =

	struct crystalcove_gpio *cg =

		gpiochip_get_data(irq_data_get_irq_chip_data(data));

		gpiochip_get_data(irq_data_get_irq_chip_data(data));





	if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {

		cg->set_irq_mask = false;

		cg->set_irq_mask = false;

		cg->update |= UPDATE_IRQ_MASK;

		cg->update |= UPDATE_IRQ_MASK;

	}

	}

}





static void crystalcove_irq_mask(struct irq_data *data)

static void crystalcove_irq_mask(struct irq_data *data)

{

{

	struct crystalcove_gpio *cg =

	struct crystalcove_gpio *cg =

		gpiochip_get_data(irq_data_get_irq_chip_data(data));

		gpiochip_get_data(irq_data_get_irq_chip_data(data));





	if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {

		cg->set_irq_mask = true;

		cg->set_irq_mask = true;

		cg->update |= UPDATE_IRQ_MASK;

		cg->update |= UPDATE_IRQ_MASK;

	}

	}

}





static struct irq_chip crystalcove_irqchip = {

static struct irq_chip crystalcove_irqchip = {

	.name			= "Crystal Cove",

	.name			= "Crystal Cove",

drivers/gpio/gpio-mvebu.c

+8 −1
Original line number Original line Diff line number Diff line
@@ -747,7 +747,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, 
		set = U32_MAX;

		set = U32_MAX;

	else

	else

		return -EINVAL;

		return -EINVAL;

	writel_relaxed(0, mvebu_gpioreg_blink_counter_select(mvchip));

	writel_relaxed(set, mvebu_gpioreg_blink_counter_select(mvchip));





	mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL);

	mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL);

	if (!mvpwm)

	if (!mvpwm)
@@ -768,6 +768,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev, 
	mvpwm->chip.dev = dev;

	mvpwm->chip.dev = dev;

	mvpwm->chip.ops = &mvebu_pwm_ops;

	mvpwm->chip.ops = &mvebu_pwm_ops;

	mvpwm->chip.npwm = mvchip->chip.ngpio;

	mvpwm->chip.npwm = mvchip->chip.ngpio;

	/*

	 * There may already be some PWM allocated, so we can't force

	 * mvpwm->chip.base to a fixed point like mvchip->chip.base.

	 * So, we let pwmchip_add() do the numbering and take the next free

	 * region.

	 */

	mvpwm->chip.base = -1;





	spin_lock_init(&mvpwm->lock);

	spin_lock_init(&mvpwm->lock);