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Commit f8a68c96 authored by Steve deRosier's avatar Steve deRosier Committed by Kalle Valo
Browse files

ath6kl: add ability to set debug uart baud rate 



It's useful to permit the customization of the debug uart baud rate. Enable
this and send down the value to the chip if we're enabling debug.

Signed-off-by: default avatarSteve deRosier <steve.derosier@lairdtech.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent 907ec43a

drivers/net/wireless/ath/ath6kl/core.c

+3 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ unsigned int debug_mask; 
static unsigned int suspend_mode;

static unsigned int wow_mode;

static unsigned int uart_debug;

static unsigned int uart_rate = 115200;

static unsigned int ath6kl_p2p;

static unsigned int testmode;

static unsigned int recovery_enable;
@@ -40,6 +41,7 @@ module_param(debug_mask, uint, 0644); 
module_param(suspend_mode, uint, 0644);

module_param(wow_mode, uint, 0644);

module_param(uart_debug, uint, 0644);

module_param(uart_rate, uint, 0644);

module_param(ath6kl_p2p, uint, 0644);

module_param(testmode, uint, 0644);

module_param(recovery_enable, uint, 0644);
@@ -180,6 +182,7 @@ int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type) 


	if (uart_debug)

		ar->conf_flags |= ATH6KL_CONF_UART_DEBUG;

	ar->hw.uarttx_rate = uart_rate;



	set_bit(FIRST_BOOT, &ar->flag);

drivers/net/wireless/ath/ath6kl/core.h

+1 −0
Original line number Diff line number Diff line
@@ -781,6 +781,7 @@ struct ath6kl { 
		u32 board_addr;

		u32 refclk_hz;

		u32 uarttx_pin;

		u32 uarttx_rate;

		u32 testscript_addr;

		u8 tx_ant;

		u8 rx_ant;

drivers/net/wireless/ath/ath6kl/init.c

+8 −0
Original line number Diff line number Diff line
@@ -651,6 +651,14 @@ int ath6kl_configure_target(struct ath6kl *ar) 
	if (status)

		return status;



	/* Only set the baud rate if we're actually doing debug */

	if (ar->conf_flags & ATH6KL_CONF_UART_DEBUG) {

		status = ath6kl_bmi_write_hi32(ar, hi_desired_baud_rate,

					       ar->hw.uarttx_rate);

		if (status)

			return status;

	}



	/* Configure target refclk_hz */

	if (ar->hw.refclk_hz != 0) {

		status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz,