Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f8086f4f authored Aug 22, 2012 by Vikas Chaudhary Committed by James Bottomley Sep 24, 2012

[SCSI] qla4xxx: Update function name from 8xxx to 82xx



Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>

parent d986788b

drivers/scsi/qla4xxx/ql4_attr.c

+4 −4

Original line number	Original line	Diff line number	Diff line
	@@ -75,13 +75,13 @@ qla4_8xxx_sysfs_write_fw_dump(struct file filep, struct kobject kobj,
	break;		break;
	case 2:		case 2:
	/* Reset HBA */		/* Reset HBA */
	qla4_8xxx_idc_lock(ha);		qla4_82xx_idc_lock(ha);
	dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);		dev_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
	if (dev_state == QLA82XX_DEV_READY) {		if (dev_state == QLA82XX_DEV_READY) {
	ql4_printk(KERN_INFO, ha,		ql4_printk(KERN_INFO, ha,
	"%s: Setting Need reset, reset_owner is 0x%x.\n",		"%s: Setting Need reset, reset_owner is 0x%x.\n",
	__func__, ha->func_num);		__func__, ha->func_num);
	qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE,		qla4_82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
	QLA82XX_DEV_NEED_RESET);		QLA82XX_DEV_NEED_RESET);
	set_bit(AF_82XX_RST_OWNER, &ha->flags);		set_bit(AF_82XX_RST_OWNER, &ha->flags);
	} else		} else
	@@ -89,7 +89,7 @@ qla4_8xxx_sysfs_write_fw_dump(struct file filep, struct kobject kobj,
	"%s: Reset not performed as device state is 0x%x\n",		"%s: Reset not performed as device state is 0x%x\n",
	__func__, dev_state);		__func__, dev_state);

	qla4_8xxx_idc_unlock(ha);		qla4_82xx_idc_unlock(ha);
	break;		break;
	default:		default:
	/* do nothing */		/* do nothing */

drivers/scsi/qla4xxx/ql4_glbl.h

+18 −18

Original line number	Original line	Diff line number	Diff line
	@@ -109,28 +109,28 @@ uint8_t qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
	void qla4_8xxx_pci_config(struct scsi_qla_host *);		void qla4_8xxx_pci_config(struct scsi_qla_host *);
	int qla4_8xxx_iospace_config(struct scsi_qla_host *ha);		int qla4_8xxx_iospace_config(struct scsi_qla_host *ha);
	int qla4_8xxx_load_risc(struct scsi_qla_host *);		int qla4_8xxx_load_risc(struct scsi_qla_host *);
	irqreturn_t qla4_8xxx_intr_handler(int irq, void *dev_id);		irqreturn_t qla4_82xx_intr_handler(int irq, void *dev_id);
	void qla4_8xxx_queue_iocb(struct scsi_qla_host *ha);		void qla4_82xx_queue_iocb(struct scsi_qla_host *ha);
	void qla4_8xxx_complete_iocb(struct scsi_qla_host *ha);		void qla4_82xx_complete_iocb(struct scsi_qla_host *ha);

	int qla4_8xxx_crb_win_lock(struct scsi_qla_host *);		int qla4_82xx_crb_win_lock(struct scsi_qla_host *);
	void qla4_8xxx_crb_win_unlock(struct scsi_qla_host *);		void qla4_82xx_crb_win_unlock(struct scsi_qla_host *);
	int qla4_8xxx_pci_get_crb_addr_2M(struct scsi_qla_host , ulong );		int qla4_82xx_pci_get_crb_addr_2M(struct scsi_qla_host , ulong );
	void qla4_8xxx_wr_32(struct scsi_qla_host *, ulong, u32);		void qla4_82xx_wr_32(struct scsi_qla_host *, ulong, u32);
	int qla4_8xxx_rd_32(struct scsi_qla_host *, ulong);		int qla4_82xx_rd_32(struct scsi_qla_host *, ulong);
	int qla4_8xxx_pci_mem_read_2M(struct scsi_qla_host , u64, void , int);		int qla4_82xx_pci_mem_read_2M(struct scsi_qla_host , u64, void , int);
	int qla4_8xxx_pci_mem_write_2M(struct scsi_qla_host ha, u64, void , int);		int qla4_82xx_pci_mem_write_2M(struct scsi_qla_host ha, u64, void , int);
	int qla4_8xxx_isp_reset(struct scsi_qla_host *ha);		int qla4_82xx_isp_reset(struct scsi_qla_host *ha);
	void qla4_8xxx_interrupt_service_routine(struct scsi_qla_host *ha,		void qla4_82xx_interrupt_service_routine(struct scsi_qla_host *ha,
	uint32_t intr_status);		uint32_t intr_status);
	uint16_t qla4_8xxx_rd_shdw_req_q_out(struct scsi_qla_host *ha);		uint16_t qla4_82xx_rd_shdw_req_q_out(struct scsi_qla_host *ha);
	uint16_t qla4_8xxx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha);		uint16_t qla4_82xx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha);
	int qla4_8xxx_get_sys_info(struct scsi_qla_host *ha);		int qla4_8xxx_get_sys_info(struct scsi_qla_host *ha);
	void qla4_8xxx_watchdog(struct scsi_qla_host *ha);		void qla4_8xxx_watchdog(struct scsi_qla_host *ha);
	int qla4_8xxx_stop_firmware(struct scsi_qla_host *ha);		int qla4_8xxx_stop_firmware(struct scsi_qla_host *ha);
	int qla4_8xxx_get_flash_info(struct scsi_qla_host *ha);		int qla4_8xxx_get_flash_info(struct scsi_qla_host *ha);
	void qla4_8xxx_enable_intrs(struct scsi_qla_host *ha);		void qla4_82xx_enable_intrs(struct scsi_qla_host *ha);
	void qla4_8xxx_disable_intrs(struct scsi_qla_host *ha);		void qla4_82xx_disable_intrs(struct scsi_qla_host *ha);
	int qla4_8xxx_enable_msix(struct scsi_qla_host *ha);		int qla4_8xxx_enable_msix(struct scsi_qla_host *ha);
	void qla4_8xxx_disable_msix(struct scsi_qla_host *ha);		void qla4_8xxx_disable_msix(struct scsi_qla_host *ha);
	irqreturn_t qla4_8xxx_msi_handler(int irq, void *dev_id);		irqreturn_t qla4_8xxx_msi_handler(int irq, void *dev_id);
	@@ -138,8 +138,8 @@ irqreturn_t qla4_8xxx_default_intr_handler(int irq, void *dev_id);
	irqreturn_t qla4_8xxx_msix_rsp_q(int irq, void *dev_id);		irqreturn_t qla4_8xxx_msix_rsp_q(int irq, void *dev_id);
	void qla4xxx_mark_all_devices_missing(struct scsi_qla_host *ha);		void qla4xxx_mark_all_devices_missing(struct scsi_qla_host *ha);
	void qla4xxx_dead_adapter_cleanup(struct scsi_qla_host *ha);		void qla4xxx_dead_adapter_cleanup(struct scsi_qla_host *ha);
	int qla4_8xxx_idc_lock(struct scsi_qla_host *ha);		int qla4_82xx_idc_lock(struct scsi_qla_host *ha);
	void qla4_8xxx_idc_unlock(struct scsi_qla_host *ha);		void qla4_82xx_idc_unlock(struct scsi_qla_host *ha);
	int qla4_8xxx_device_state_handler(struct scsi_qla_host *ha);		int qla4_8xxx_device_state_handler(struct scsi_qla_host *ha);
	void qla4_8xxx_need_qsnt_handler(struct scsi_qla_host *ha);		void qla4_8xxx_need_qsnt_handler(struct scsi_qla_host *ha);
	void qla4_8xxx_clear_drv_active(struct scsi_qla_host *ha);		void qla4_8xxx_clear_drv_active(struct scsi_qla_host *ha);

drivers/scsi/qla4xxx/ql4_iocb.c

+5 −5

Original line number	Original line	Diff line number	Diff line
	@@ -193,31 +193,31 @@ static void qla4xxx_build_scsi_iocbs(struct srb *srb,
	}		}

	/**		/**
	* qla4_8xxx_queue_iocb - Tell ISP it's got new request(s)		* qla4_82xx_queue_iocb - Tell ISP it's got new request(s)
	* @ha: pointer to host adapter structure.		* @ha: pointer to host adapter structure.
	*		*
	* This routine notifies the ISP that one or more new request		* This routine notifies the ISP that one or more new request
	* queue entries have been placed on the request queue.		* queue entries have been placed on the request queue.
	**/		**/
	void qla4_8xxx_queue_iocb(struct scsi_qla_host *ha)		void qla4_82xx_queue_iocb(struct scsi_qla_host *ha)
	{		{
	uint32_t dbval = 0;		uint32_t dbval = 0;

	dbval = 0x14 \| (ha->func_num << 5);		dbval = 0x14 \| (ha->func_num << 5);
	dbval = dbval \| (0 << 8) \| (ha->request_in << 16);		dbval = dbval \| (0 << 8) \| (ha->request_in << 16);

	qla4_8xxx_wr_32(ha, ha->nx_db_wr_ptr, ha->request_in);		qla4_82xx_wr_32(ha, ha->nx_db_wr_ptr, ha->request_in);
	}		}

	/**		/**
	* qla4_8xxx_complete_iocb - Tell ISP we're done with response(s)		* qla4_82xx_complete_iocb - Tell ISP we're done with response(s)
	* @ha: pointer to host adapter structure.		* @ha: pointer to host adapter structure.
	*		*
	* This routine notifies the ISP that one or more response/completion		* This routine notifies the ISP that one or more response/completion
	* queue entries have been processed by the driver.		* queue entries have been processed by the driver.
	* This also clears the interrupt.		* This also clears the interrupt.
	**/		**/
	void qla4_8xxx_complete_iocb(struct scsi_qla_host *ha)		void qla4_82xx_complete_iocb(struct scsi_qla_host *ha)
	{		{
	writel(ha->response_out, &ha->qla4_8xxx_reg->rsp_q_out);		writel(ha->response_out, &ha->qla4_8xxx_reg->rsp_q_out);
	readl(&ha->qla4_8xxx_reg->rsp_q_out);		readl(&ha->qla4_8xxx_reg->rsp_q_out);

drivers/scsi/qla4xxx/ql4_isr.c

+20 −20

Original line number	Original line	Diff line number	Diff line
	@@ -816,13 +816,13 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha,
	}		}

	/**		/**
	* qla4_8xxx_interrupt_service_routine - isr		* qla4_82xx_interrupt_service_routine - isr
	* @ha: pointer to host adapter structure.		* @ha: pointer to host adapter structure.
	*		*
	* This is the main interrupt service routine.		* This is the main interrupt service routine.
	* hardware_lock locked upon entry. runs in interrupt context.		* hardware_lock locked upon entry. runs in interrupt context.
	**/		**/
	void qla4_8xxx_interrupt_service_routine(struct scsi_qla_host *ha,		void qla4_82xx_interrupt_service_routine(struct scsi_qla_host *ha,
	uint32_t intr_status)		uint32_t intr_status)
	{		{
	/* Process response queue interrupt. */		/* Process response queue interrupt. */
	@@ -866,12 +866,12 @@ void qla4xxx_interrupt_service_routine(struct scsi_qla_host * ha,
	}		}

	/**		/**
	* qla4_8xxx_spurious_interrupt - processes spurious interrupt		* qla4_82xx_spurious_interrupt - processes spurious interrupt
	* @ha: pointer to host adapter structure.		* @ha: pointer to host adapter structure.
	* @reqs_count: .		* @reqs_count: .
	*		*
	**/		**/
	static void qla4_8xxx_spurious_interrupt(struct scsi_qla_host *ha,		static void qla4_82xx_spurious_interrupt(struct scsi_qla_host *ha,
	uint8_t reqs_count)		uint8_t reqs_count)
	{		{
	if (reqs_count)		if (reqs_count)
	@@ -881,7 +881,7 @@ static void qla4_8xxx_spurious_interrupt(struct scsi_qla_host *ha,
	if (is_qla8022(ha)) {		if (is_qla8022(ha)) {
	writel(0, &ha->qla4_8xxx_reg->host_int);		writel(0, &ha->qla4_8xxx_reg->host_int);
	if (test_bit(AF_INTx_ENABLED, &ha->flags))		if (test_bit(AF_INTx_ENABLED, &ha->flags))
	qla4_8xxx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg,		qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg,
	0xfbff);		0xfbff);
	}		}
	ha->spurious_int_count++;		ha->spurious_int_count++;
	@@ -984,11 +984,11 @@ irqreturn_t qla4xxx_intr_handler(int irq, void *dev_id)
	}		}

	/**		/**
	* qla4_8xxx_intr_handler - hardware interrupt handler.		* qla4_82xx_intr_handler - hardware interrupt handler.
	* @irq: Unused		* @irq: Unused
	* @dev_id: Pointer to host adapter structure		* @dev_id: Pointer to host adapter structure
	**/		**/
	irqreturn_t qla4_8xxx_intr_handler(int irq, void *dev_id)		irqreturn_t qla4_82xx_intr_handler(int irq, void *dev_id)
	{		{
	struct scsi_qla_host *ha = dev_id;		struct scsi_qla_host *ha = dev_id;
	uint32_t intr_status;		uint32_t intr_status;
	@@ -1000,11 +1000,11 @@ irqreturn_t qla4_8xxx_intr_handler(int irq, void *dev_id)
	return IRQ_HANDLED;		return IRQ_HANDLED;

	ha->isr_count++;		ha->isr_count++;
	status = qla4_8xxx_rd_32(ha, ISR_INT_VECTOR);		status = qla4_82xx_rd_32(ha, ISR_INT_VECTOR);
	if (!(status & ha->nx_legacy_intr.int_vec_bit))		if (!(status & ha->nx_legacy_intr.int_vec_bit))
	return IRQ_NONE;		return IRQ_NONE;

	status = qla4_8xxx_rd_32(ha, ISR_INT_STATE_REG);		status = qla4_82xx_rd_32(ha, ISR_INT_STATE_REG);
	if (!ISR_IS_LEGACY_INTR_TRIGGERED(status)) {		if (!ISR_IS_LEGACY_INTR_TRIGGERED(status)) {
	DEBUG2(ql4_printk(KERN_INFO, ha,		DEBUG2(ql4_printk(KERN_INFO, ha,
	"%s legacy Int not triggered\n", __func__));		"%s legacy Int not triggered\n", __func__));
	@@ -1012,30 +1012,30 @@ irqreturn_t qla4_8xxx_intr_handler(int irq, void *dev_id)
	}		}

	/* clear the interrupt */		/* clear the interrupt */
	qla4_8xxx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff);		qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff);

	/* read twice to ensure write is flushed */		/* read twice to ensure write is flushed */
	qla4_8xxx_rd_32(ha, ISR_INT_VECTOR);		qla4_82xx_rd_32(ha, ISR_INT_VECTOR);
	qla4_8xxx_rd_32(ha, ISR_INT_VECTOR);		qla4_82xx_rd_32(ha, ISR_INT_VECTOR);

	spin_lock_irqsave(&ha->hardware_lock, flags);		spin_lock_irqsave(&ha->hardware_lock, flags);
	while (1) {		while (1) {
	if (!(readl(&ha->qla4_8xxx_reg->host_int) &		if (!(readl(&ha->qla4_8xxx_reg->host_int) &
	ISRX_82XX_RISC_INT)) {		ISRX_82XX_RISC_INT)) {
	qla4_8xxx_spurious_interrupt(ha, reqs_count);		qla4_82xx_spurious_interrupt(ha, reqs_count);
	break;		break;
	}		}
	intr_status = readl(&ha->qla4_8xxx_reg->host_status);		intr_status = readl(&ha->qla4_8xxx_reg->host_status);
	if ((intr_status &		if ((intr_status &
	(HSRX_RISC_MB_INT \| HSRX_RISC_IOCB_INT)) == 0) {		(HSRX_RISC_MB_INT \| HSRX_RISC_IOCB_INT)) == 0) {
	qla4_8xxx_spurious_interrupt(ha, reqs_count);		qla4_82xx_spurious_interrupt(ha, reqs_count);
	break;		break;
	}		}

	ha->isp_ops->interrupt_service_routine(ha, intr_status);		ha->isp_ops->interrupt_service_routine(ha, intr_status);

	/* Enable Interrupt */		/* Enable Interrupt */
	qla4_8xxx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff);		qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff);

	if (++reqs_count == MAX_REQS_SERVICED_PER_INTR)		if (++reqs_count == MAX_REQS_SERVICED_PER_INTR)
	break;		break;
	@@ -1059,11 +1059,11 @@ qla4_8xxx_msi_handler(int irq, void *dev_id)

	ha->isr_count++;		ha->isr_count++;
	/* clear the interrupt */		/* clear the interrupt */
	qla4_8xxx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff);		qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff);

	/* read twice to ensure write is flushed */		/* read twice to ensure write is flushed */
	qla4_8xxx_rd_32(ha, ISR_INT_VECTOR);		qla4_82xx_rd_32(ha, ISR_INT_VECTOR);
	qla4_8xxx_rd_32(ha, ISR_INT_VECTOR);		qla4_82xx_rd_32(ha, ISR_INT_VECTOR);

	return qla4_8xxx_default_intr_handler(irq, dev_id);		return qla4_8xxx_default_intr_handler(irq, dev_id);
	}		}
	@@ -1088,14 +1088,14 @@ qla4_8xxx_default_intr_handler(int irq, void *dev_id)
	while (1) {		while (1) {
	if (!(readl(&ha->qla4_8xxx_reg->host_int) &		if (!(readl(&ha->qla4_8xxx_reg->host_int) &
	ISRX_82XX_RISC_INT)) {		ISRX_82XX_RISC_INT)) {
	qla4_8xxx_spurious_interrupt(ha, reqs_count);		qla4_82xx_spurious_interrupt(ha, reqs_count);
	break;		break;
	}		}

	intr_status = readl(&ha->qla4_8xxx_reg->host_status);		intr_status = readl(&ha->qla4_8xxx_reg->host_status);
	if ((intr_status &		if ((intr_status &
	(HSRX_RISC_MB_INT \| HSRX_RISC_IOCB_INT)) == 0) {		(HSRX_RISC_MB_INT \| HSRX_RISC_IOCB_INT)) == 0) {
	qla4_8xxx_spurious_interrupt(ha, reqs_count);		qla4_82xx_spurious_interrupt(ha, reqs_count);
	break;		break;
	}		}

drivers/scsi/qla4xxx/ql4_mbx.c

+6 −6

Original line number	Original line	Diff line number	Diff line
	@@ -85,9 +85,9 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
	goto mbox_exit;		goto mbox_exit;
	}		}
	/* Do not send any mbx cmd if h/w is in failed state*/		/* Do not send any mbx cmd if h/w is in failed state*/
	qla4_8xxx_idc_lock(ha);		qla4_82xx_idc_lock(ha);
	dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);		dev_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
	qla4_8xxx_idc_unlock(ha);		qla4_82xx_idc_unlock(ha);
	if (dev_state == QLA82XX_DEV_FAILED) {		if (dev_state == QLA82XX_DEV_FAILED) {
	ql4_printk(KERN_WARNING, ha,		ql4_printk(KERN_WARNING, ha,
	"scsi%ld: %s: H/W is in failed state, do not send any mailbox commands\n",		"scsi%ld: %s: H/W is in failed state, do not send any mailbox commands\n",
	@@ -180,7 +180,7 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
	&ha->flags) &&		&ha->flags) &&
	test_bit(AF_INTx_ENABLED,		test_bit(AF_INTx_ENABLED,
	&ha->flags))		&ha->flags))
	qla4_8xxx_wr_32(ha,		qla4_82xx_wr_32(ha,
	ha->nx_legacy_intr.tgt_mask_reg,		ha->nx_legacy_intr.tgt_mask_reg,
	0xfbff);		0xfbff);
	}		}
	@@ -222,7 +222,7 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
	if (is_qla8022(ha)) {		if (is_qla8022(ha)) {
	ql4_printk(KERN_INFO, ha,		ql4_printk(KERN_INFO, ha,
	"disabling pause transmit on port 0 & 1.\n");		"disabling pause transmit on port 0 & 1.\n");
	qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x98,		qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98,
	CRB_NIU_XG_PAUSE_CTL_P0 \|		CRB_NIU_XG_PAUSE_CTL_P0 \|
	CRB_NIU_XG_PAUSE_CTL_P1);		CRB_NIU_XG_PAUSE_CTL_P1);
	}		}
	@@ -373,7 +373,7 @@ qla4xxx_set_ifcb(struct scsi_qla_host ha, uint32_t mbox_cmd,
	memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);		memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);

	if (is_qla8022(ha))		if (is_qla8022(ha))
	qla4_8xxx_wr_32(ha, ha->nx_db_wr_ptr, 0);		qla4_82xx_wr_32(ha, ha->nx_db_wr_ptr, 0);

	mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;		mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
	mbox_cmd[1] = 0;		mbox_cmd[1] = 0;