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Commit f74ba117 authored by Addy Ke's avatar Addy Ke Committed by Heiko Stuebner
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ARM: dts: rockchip: set dw_mmc max-freq 150Mhz 



All of mmc controllers include SDMMC, SDIO0, SDIO1, and EMMC on RK3288
are limited to 150Mhz. It was mainly caused by two reasons:
- RK3288's IO pad(except DDR IO pad) is generic, which can only support
  the max of 150Mhz.
- Mmc controller was designed at 150Mhz, and the pressure test by IC team
  was based on this freequency point.

Signed-off-by: default avatarAddy Ke <addy.ke@rock-chips.com>
Reviewed-by: default avatarDoug Anderson <dianders@chromium.org>
Tested-by: default avatarDoug Anderson <dianders@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 97bf6af1

arch/arm/boot/dts/rk3288.dtsi

+4 −0
Original line number Original line Diff line number Diff line
@@ -151,6 +151,7 @@ 




	sdmmc: dwmmc@ff0c0000 {

	sdmmc: dwmmc@ff0c0000 {

		compatible = "rockchip,rk3288-dw-mshc";

		compatible = "rockchip,rk3288-dw-mshc";

		clock-freq-min-max = <400000 150000000>;

		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;

		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;

		clock-names = "biu", "ciu";

		clock-names = "biu", "ciu";

		fifo-depth = <0x100>;

		fifo-depth = <0x100>;
@@ -161,6 +162,7 @@ 




	sdio0: dwmmc@ff0d0000 {

	sdio0: dwmmc@ff0d0000 {

		compatible = "rockchip,rk3288-dw-mshc";

		compatible = "rockchip,rk3288-dw-mshc";

		clock-freq-min-max = <400000 150000000>;

		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>;

		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>;

		clock-names = "biu", "ciu";

		clock-names = "biu", "ciu";

		fifo-depth = <0x100>;

		fifo-depth = <0x100>;
@@ -171,6 +173,7 @@ 




	sdio1: dwmmc@ff0e0000 {

	sdio1: dwmmc@ff0e0000 {

		compatible = "rockchip,rk3288-dw-mshc";

		compatible = "rockchip,rk3288-dw-mshc";

		clock-freq-min-max = <400000 150000000>;

		clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>;

		clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>;

		clock-names = "biu", "ciu";

		clock-names = "biu", "ciu";

		fifo-depth = <0x100>;

		fifo-depth = <0x100>;
@@ -181,6 +184,7 @@ 




	emmc: dwmmc@ff0f0000 {

	emmc: dwmmc@ff0f0000 {

		compatible = "rockchip,rk3288-dw-mshc";

		compatible = "rockchip,rk3288-dw-mshc";

		clock-freq-min-max = <400000 150000000>;

		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;

		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;

		clock-names = "biu", "ciu";

		clock-names = "biu", "ciu";

		fifo-depth = <0x100>;

		fifo-depth = <0x100>;