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Commit f733fefa authored by Prudhvi Yarlagadda's avatar Prudhvi Yarlagadda Committed by Gerrit - the friendly Code Review server
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serial: msm_geni_serial: Add enable/disable of dma irq bits 



Correct the enable/disable bits of dma interrupt registers by
using DMA_IRQ_EN_SET/DMA_IRQ_EN_CLR registers respectively.

Previously DMA_IRQ_EN register was used to set and unset the
dma interrupt register bits but, DMA_IRQ_EN is a read only
register and DMA_IRQ_EN_SET and DMA_IRQ_EN_CLR are the right
registers for setting and unsetting the dma interrupt bits.

Change-Id: I0c873742b32960673320ddc9a9e3c88922a22684
Signed-off-by: default avatarPrudhvi Yarlagadda <pyarlaga@codeaurora.org>
parent 396f7894

drivers/tty/serial/msm_geni_serial.c

+10 −32
Original line number Diff line number Diff line
@@ -124,11 +124,11 @@ 
#define S_IRQ_BITS		(S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN |\

				S_CMD_CANCEL_EN | S_CMD_ABORT_EN)

#define DMA_TX_IRQ_BITS		(TX_RESET_DONE | TX_DMA_DONE |\

				TX_GENI_CANCEL_IRQ)

				TX_GENI_CANCEL_IRQ | TX_EOT | TX_SBE)

#define DMA_RX_IRQ_BITS		(RX_EOT | RX_GENI_CANCEL_IRQ |\

				RX_RESET_DONE | UART_DMA_RX_ERRS |\

				UART_DMA_RX_PARITY_ERR | UART_DMA_RX_BREAK |\

				RX_DMA_DONE)

				RX_DMA_DONE | RX_SBE)



/* Required for polling for 100 msecs */

#define POLL_WAIT_TIMEOUT_MSEC	100
@@ -269,34 +269,23 @@ static int msm_geni_serial_spinlocked(struct uart_port *uport) 
static void msm_geni_serial_enable_interrupts(struct uart_port *uport)

{

	unsigned int geni_m_irq_en, geni_s_irq_en;

	unsigned int dma_m_irq_en, dma_s_irq_en;

	struct msm_geni_serial_port *port = GET_DEV_PORT(uport);



	geni_m_irq_en = geni_read_reg_nolog(uport->membase,

						SE_GENI_M_IRQ_EN);

	geni_s_irq_en = geni_read_reg_nolog(uport->membase,

						SE_GENI_S_IRQ_EN);

	if (port->xfer_mode == SE_DMA) {

		dma_m_irq_en = geni_read_reg_nolog(uport->membase,

						SE_DMA_TX_IRQ_EN);

		dma_s_irq_en = geni_read_reg_nolog(uport->membase,

						SE_DMA_RX_IRQ_EN);

	}



	geni_m_irq_en |= M_IRQ_BITS;

	geni_s_irq_en |= S_IRQ_BITS;

	if (port->xfer_mode == SE_DMA) {

		dma_m_irq_en |= DMA_TX_IRQ_BITS;

		dma_s_irq_en |= DMA_RX_IRQ_BITS;

	}



	geni_write_reg_nolog(geni_m_irq_en, uport->membase, SE_GENI_M_IRQ_EN);

	geni_write_reg_nolog(geni_s_irq_en, uport->membase, SE_GENI_S_IRQ_EN);

	if (port->xfer_mode == SE_DMA) {

		geni_write_reg_nolog(dma_m_irq_en, uport->membase,

							SE_DMA_TX_IRQ_EN);

		geni_write_reg_nolog(dma_s_irq_en, uport->membase,

							SE_DMA_RX_IRQ_EN);

		geni_write_reg_nolog(DMA_TX_IRQ_BITS, uport->membase,

							SE_DMA_TX_IRQ_EN_SET);

		geni_write_reg_nolog(DMA_RX_IRQ_BITS, uport->membase,

							SE_DMA_RX_IRQ_EN_SET);

	}

}
@@ -304,7 +293,6 @@ static void msm_geni_serial_enable_interrupts(struct uart_port *uport) 
static bool msm_serial_try_disable_interrupts(struct uart_port *uport)

{

	unsigned int geni_m_irq_en, geni_s_irq_en;

	unsigned int dma_m_irq_en, dma_s_irq_en;

	struct msm_geni_serial_port *port = GET_DEV_PORT(uport);



	/*
@@ -316,27 +304,17 @@ static bool msm_serial_try_disable_interrupts(struct uart_port *uport) 


	geni_m_irq_en = geni_read_reg_nolog(uport->membase, SE_GENI_M_IRQ_EN);

	geni_s_irq_en = geni_read_reg_nolog(uport->membase, SE_GENI_S_IRQ_EN);

	if (port->xfer_mode == SE_DMA) {

		dma_m_irq_en = geni_read_reg_nolog(uport->membase,

						SE_DMA_TX_IRQ_EN);

		dma_s_irq_en = geni_read_reg_nolog(uport->membase,

						SE_DMA_RX_IRQ_EN);

	}



	geni_m_irq_en &= ~M_IRQ_BITS;

	geni_s_irq_en &= ~S_IRQ_BITS;

	if (port->xfer_mode == SE_DMA) {

		dma_m_irq_en &= ~DMA_TX_IRQ_BITS;

		dma_s_irq_en &= ~DMA_RX_IRQ_BITS;

	}



	geni_write_reg_nolog(geni_m_irq_en, uport->membase, SE_GENI_M_IRQ_EN);

	geni_write_reg_nolog(geni_s_irq_en, uport->membase, SE_GENI_S_IRQ_EN);

	if (port->xfer_mode == SE_DMA) {

		geni_write_reg_nolog(dma_m_irq_en, uport->membase,

							SE_DMA_TX_IRQ_EN);

		geni_write_reg_nolog(dma_s_irq_en, uport->membase,

							SE_DMA_RX_IRQ_EN);

		geni_write_reg_nolog(DMA_TX_IRQ_BITS, uport->membase,

							SE_DMA_TX_IRQ_EN_CLR);

		geni_write_reg_nolog(DMA_RX_IRQ_BITS, uport->membase,

							SE_DMA_RX_IRQ_EN_CLR);

	}



	return true;