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Commit f5cfc8db authored by Aaro Koskinen's avatar Aaro Koskinen Committed by Ralf Baechle
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STAGING: Octeon: Set SSO group mask properly on CN68XX 



CN68XX uses SSO instead of POW.

Signed-off-by: default avatarAaro Koskinen <aaro.koskinen@nokia.com>
Acked-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Janne Huttunen <janne.huttunen@nokia.com>
Cc: Aaro Koskinen <aaro.koskinen@nokia.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: devel@driverdev.osuosl.org
Patchwork: https://patchwork.linux-mips.org/patch/10966/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent bcbb1396

drivers/staging/octeon/ethernet-rx.c

+17 −4
Original line number Diff line number Diff line
@@ -172,9 +172,16 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget) 
	}



	/* Only allow work for our group (and preserve priorities) */

	if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {

		old_group_mask = cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid));

		cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid),

				1ull << pow_receive_group);

		cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */

	} else {

		old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid));

		cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid),

			(old_group_mask & ~0xFFFFull) | 1 << pow_receive_group);

	}



	if (USE_ASYNC_IOBDMA) {

		cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
@@ -397,7 +404,13 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget) 
		}

	}

	/* Restore the original POW group mask */

	if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {

		cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid), old_group_mask);

		cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */

	} else {

		cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask);

	}



	if (USE_ASYNC_IOBDMA) {

		/* Restore the scratch area */

		cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch);