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Commit f52ecbcf authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: don't update GEN6_PMIMR when it's not needed 



I did some brief tests and the "new_val = pmimr" condition usually
happens a few times after exiting games.

Note: This is also prep work to track the GEN6_PMIMR register state in
dev_priv->pm_imr. This happens in the next patch.

Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
[danvet: Add note to explain why we want this, as per the discussion
between Chris and Paulo.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent edbfdb45

drivers/gpu/drm/i915/i915_irq.c

+9 −5
Original line number Diff line number Diff line
@@ -142,15 +142,19 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv, 
			      uint32_t interrupt_mask,

			      uint32_t enabled_irq_mask)

{

	uint32_t pmimr = I915_READ(GEN6_PMIMR);

	pmimr &= ~interrupt_mask;

	pmimr |= (~enabled_irq_mask & interrupt_mask);

	uint32_t pmimr, new_val;



	assert_spin_locked(&dev_priv->irq_lock);



	I915_WRITE(GEN6_PMIMR, pmimr);

	pmimr = new_val = I915_READ(GEN6_PMIMR);

	new_val &= ~interrupt_mask;

	new_val |= (~enabled_irq_mask & interrupt_mask);



	if (new_val != pmimr) {

		I915_WRITE(GEN6_PMIMR, new_val);

		POSTING_READ(GEN6_PMIMR);

	}

}



void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask)

{