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Commit f4c6dca5 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add a new power level for supported devices"

parents d36c57e3 4e179552

qcom/kona-gpu.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -103,8 +103,8 @@ 
		/* GPU OPP data */

		operating-points-v2 = <&gpu_opp_table>;



		nvmem-cells = <&gpu_lm_efuse>;

		nvmem-cell-names = "isense_slope";

		nvmem-cells = <&gpu_lm_efuse>, <&gpu_speed_bin>;

		nvmem-cell-names = "isense_slope", "speed_bin";



		qcom,bus-accesses-ddr7 = <970>;

		qcom,bus-accesses-ddr8 = <1162>;

qcom/kona-v2-gpu.dtsi

+220 −96
Original line number Diff line number Diff line
@@ -8,6 +8,11 @@ 
	gpu_opp_table_v2: gpu-opp-table_v2 {

		compatible = "operating-points-v2";



		opp-670000000 {

			opp-hz = /bits/ 64 <670000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM_L1>;

		};



		opp-587000000 {

			opp-hz = /bits/ 64 <587000000>;

			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
@@ -46,17 +51,21 @@ 
	/* GPU OPP data */

	operating-points-v2 = <&gpu_opp_table_v2>;



	qcom,initial-pwrlevel = <5>;



	/* Power level to start throttling */

	qcom,throttle-pwrlevel = <0>;

	/delete-property/qcom,initial-pwrlevel;

	/delete-node/qcom,gpu-pwrlevels;



	/* Power levels */

	qcom,gpu-pwrlevels {

	/* Power levels bins */

	qcom,gpu-pwrlevel-bins {

		compatible="qcom,gpu-pwrlevel-bins";

		#address-cells = <1>;

		#size-cells = <0>;



		compatible = "qcom,gpu-pwrlevels";

		qcom,gpu-pwrlevels-0 {

			#address-cells = <1>;

			#size-cells = <0>;

			qcom,speed-bin = <0>;

			qcom,initial-pwrlevel = <5>;

			qcom,throttle-pwrlevel = <0>;



			qcom,gpu-pwrlevel@0 {

				reg = <0>;
@@ -150,4 +159,119 @@ 
				qcom,bus-max = <0>;

			};

		};



		qcom,gpu-pwrlevels-1 {

			#address-cells = <1>;

			#size-cells = <0>;

			qcom,speed-bin = <1>;

			qcom,initial-pwrlevel = <6>;

			qcom,throttle-pwrlevel = <1>;



			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <670000000>;

				qcom,bus-freq-ddr7 = <11>;

				qcom,bus-min-ddr7 = <11>;

				qcom,bus-max-ddr7 = <11>;



				qcom,bus-freq-ddr8 = <11>;

				qcom,bus-min-ddr8 = <11>;

				qcom,bus-max-ddr8 = <11>;



				qcom,acd-level = <0x802b5ffd>;

			};



			qcom,gpu-pwrlevel@1 {

				reg = <1>;

				qcom,gpu-freq = <587000000>;

				qcom,bus-freq-ddr7 = <11>;

				qcom,bus-min-ddr7 = <11>;

				qcom,bus-max-ddr7 = <11>;



				qcom,bus-freq-ddr8 = <11>;

				qcom,bus-min-ddr8 = <11>;

				qcom,bus-max-ddr8 = <11>;



				qcom,acd-level = <0x802b5ffd>;

			};



			qcom,gpu-pwrlevel@2 {

				reg = <2>;

				qcom,gpu-freq = <525000000>;

				qcom,bus-freq-ddr7 = <9>;

				qcom,bus-min-ddr7 = <9>;

				qcom,bus-max-ddr7 = <11>;



				qcom,bus-freq-ddr8 = <8>;

				qcom,bus-min-ddr8 = <8>;

				qcom,bus-max-ddr8 = <11>;



				qcom,acd-level = <0x802b5ffd>;

			};



			qcom,gpu-pwrlevel@3 {

				reg = <3>;

				qcom,gpu-freq = <490000000>;

				qcom,bus-freq-ddr7 = <9>;

				qcom,bus-min-ddr7 = <6>;

				qcom,bus-max-ddr7 = <9>;



				qcom,bus-freq-ddr8 = <8>;

				qcom,bus-min-ddr8 = <7>;

				qcom,bus-max-ddr8 = <9>;



				qcom,acd-level = <0xa02b5ffd>;

			};



			qcom,gpu-pwrlevel@4 {

				reg = <4>;

				qcom,gpu-freq = <441600000>;

				qcom,bus-freq-ddr7 = <9>;

				qcom,bus-min-ddr7 = <6>;

				qcom,bus-max-ddr7 = <9>;



				qcom,bus-freq-ddr8 = <8>;

				qcom,bus-min-ddr8 = <7>;

				qcom,bus-max-ddr8 = <9>;



				qcom,acd-level = <0xa02b5ffd>;

			};



			qcom,gpu-pwrlevel@5 {

				reg = <5>;

				qcom,gpu-freq = <400000000>;

				qcom,bus-freq-ddr7 = <7>;

				qcom,bus-min-ddr7 = <6>;

				qcom,bus-max-ddr7 = <9>;



				qcom,bus-freq-ddr8 = <8>;

				qcom,bus-min-ddr8 = <6>;

				qcom,bus-max-ddr8 = <9>;



				qcom,acd-level = <0xa02b5ffd>;

			};



			qcom,gpu-pwrlevel@6 {

				reg = <6>;

				qcom,gpu-freq = <305000000>;

				qcom,bus-freq-ddr7 = <3>;

				qcom,bus-min-ddr7 = <2>;

				qcom,bus-max-ddr7 = <9>;



				qcom,bus-freq-ddr8 = <3>;

				qcom,bus-min-ddr8 = <2>;

				qcom,bus-max-ddr8 = <9>;



				qcom,acd-level = <0xa02b5ffd>;

			};



			qcom,gpu-pwrlevel@7 {

				reg = <7>;

				qcom,gpu-freq = <0>;

				qcom,bus-freq = <0>;

				qcom,bus-min = <0>;

				qcom,bus-max = <0>;

			};

		};

	};

};

qcom/kona.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -4965,6 +4965,11 @@ 
		gpu_lm_efuse: gpu_lm_efuse@5c8 {

			reg = <0x5c8 0x4>;

		};



		gpu_speed_bin: gpu_speed_bin@19b {

			reg = <0x19b 0x1>;

			bits = <5 3>;

		};

	};

};