Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f4a458fd authored by Minghuan Lian's avatar Minghuan Lian Committed by Shawn Guo
Browse files

ARM: dts: ls1021a: add SCFG MSI dts node



Add SCFG MSI dts node and add msi-parent property to PCIe dts node
that points to the corresponding MSI node.

Signed-off-by: default avatarMinghuan Lian <Minghuan.Lian@nxp.com>
Tested-by: default avatarAlexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9eb7db1c
Loading
Loading
Loading
Loading
+16 −0
Original line number Diff line number Diff line
@@ -119,6 +119,20 @@

		};

		msi1: msi-controller@1570e00 {
			compatible = "fsl,1s1021a-msi";
			reg = <0x0 0x1570e00 0x0 0x8>;
			msi-controller;
			interrupts =  <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
		};

		msi2: msi-controller@1570e08 {
			compatible = "fsl,1s1021a-msi";
			reg = <0x0 0x1570e08 0x0 0x8>;
			msi-controller;
			interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
		};

		ifc: ifc@1530000 {
			compatible = "fsl,ifc", "simple-bus";
			reg = <0x0 0x1530000 0x0 0x10000>;
@@ -587,6 +601,7 @@
			bus-range = <0x0 0xff>;
			ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
			msi-parent = <&msi1>;
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 7>;
			interrupt-map = <0000 0 0 1 &gic GIC_SPI 91  IRQ_TYPE_LEVEL_HIGH>,
@@ -609,6 +624,7 @@
			bus-range = <0x0 0xff>;
			ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
				  0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
			msi-parent = <&msi2>;
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 7>;
			interrupt-map = <0000 0 0 1 &gic GIC_SPI 92  IRQ_TYPE_LEVEL_HIGH>,