Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f3dec783 authored by Michael Hennerich's avatar Michael Hennerich Committed by Mike Frysinger
Browse files

Blackfin: increase NR_IRQS beyond NR on-chip IRQs



This makes room for off-chip IRQ controllers.

Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 5e8d3210
Loading
Loading
Loading
Loading
+3 −0
Original line number Diff line number Diff line
@@ -12,6 +12,9 @@

#include <linux/irqflags.h>

/* IRQs that may be used by external irq_chip controllers */
#define NR_SPARE_IRQS	32

#include <mach/anomaly.h>

/* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h> */
+2 −1
Original line number Diff line number Diff line
@@ -151,7 +151,8 @@

#define GPIO_IRQ_BASE	IRQ_PF0

#define NR_IRQS     (IRQ_PH15 + 1)
#define NR_MACH_IRQS	(IRQ_PH15 + 1)
#define NR_IRQS		(NR_MACH_IRQS + NR_SPARE_IRQS)

#define IVG7            7
#define IVG8            8
+2 −1
Original line number Diff line number Diff line
@@ -151,7 +151,8 @@

#define GPIO_IRQ_BASE	IRQ_PF0

#define NR_IRQS     (IRQ_PH15+1)
#define NR_MACH_IRQS	(IRQ_PH15 + 1)
#define NR_IRQS		(NR_MACH_IRQS + NR_SPARE_IRQS)

#define IVG7            7
#define IVG8            8
+2 −1
Original line number Diff line number Diff line
@@ -104,7 +104,8 @@ Core Emulation **

#define GPIO_IRQ_BASE		IRQ_PF0

#define	NR_IRQS		(IRQ_PF15+1)
#define NR_MACH_IRQS		(IRQ_PF15 + 1)
#define NR_IRQS			(NR_MACH_IRQS + NR_SPARE_IRQS)

#define IVG7			7
#define IVG8			8
+2 −1
Original line number Diff line number Diff line
@@ -134,7 +134,8 @@

#define GPIO_IRQ_BASE	IRQ_PF0

#define NR_IRQS     (IRQ_PH15+1)
#define NR_MACH_IRQS	(IRQ_PH15 + 1)
#define NR_IRQS		(NR_MACH_IRQS + NR_SPARE_IRQS)

#define IVG7            7
#define IVG8            8
Loading